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mtd: spi-nor-core: Track flash's internal address mode

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The nor->addr_width tracks number of address bytes used in
read/program/erase ops and eventually set to 4 for >16MB chips, regardless
of flash's internal address mode. For Infineon SEMPER flash's, we use
Read/Write Any Register commands for configuration and status check.
These commands take 3- or 4-byte address depending on flash's internal
address mode.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
This commit is contained in:
Takahiro Kuwano 2022-09-01 15:05:31 +09:00 committed by Jagan Teki
parent ee1c709cfd
commit 4d60001fdf
2 changed files with 7 additions and 0 deletions
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2
drivers/mtd/spi/spi-nor-core.c
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@ -2238,10 +2238,12 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor,
case BFPT_DWORD1_ADDRESS_BYTES_3_ONLY:
case BFPT_DWORD1_ADDRESS_BYTES_3_OR_4:
nor->addr_width = 3;
nor->addr_mode_nbytes = 3;
break;
case BFPT_DWORD1_ADDRESS_BYTES_4_ONLY:
nor->addr_width = 4;
nor->addr_mode_nbytes = 4;
break;
default:

5
include/linux/mtd/spi-nor.h
View File

@ -494,6 +494,10 @@ struct spi_flash {
* @rdsr_dummy dummy cycles needed for Read Status Register command.
* @rdsr_addr_nbytes: dummy address bytes needed for Read Status Register
* command.
* @addr_mode_nbytes: number of address bytes of current address mode. Useful
* when the flash operates with 4B opcodes but needs the
* internal address mode for opcodes that don't have a 4B
* opcode correspondent.
* @bank_read_cmd: Bank read cmd
* @bank_write_cmd: Bank write cmd
* @bank_curr: Current flash bank
@ -540,6 +544,7 @@ struct spi_nor {
u8 program_opcode;
u8 rdsr_dummy;
u8 rdsr_addr_nbytes;
u8 addr_mode_nbytes;
#ifdef CONFIG_SPI_FLASH_BAR
u8 bank_read_cmd;
u8 bank_write_cmd;