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board: sifive: support spl multi-dtb on unmatched board

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There are two revisions of unmatched board with different DDR timing,
we'd like to support multi-dtb mechanism in SPL, then it selects the
right DTB at runtime according to PCB revision in I2C EEPROM.

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
This commit is contained in:
Zong Li
2021-06-30 23:23:50 +08:00
committed by Leo Yu-Chi Liang
parent ffe9a394df
commit 4b4159d0f3
2 changed files with 30 additions and 2 deletions
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4
configs/sifive_unmatched_defconfig
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@@ -41,3 +41,7 @@ CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_PCI=y
CONFIG_SPL_MULTI_DTB_FIT=y
CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
CONFIG_SPL_OF_LIST="hifive-unmatched-a00 hifive-unmatched-a00-rev1"
CONFIG_SPL_SYS_MALLOC_F_LEN=0x100000