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arm: socfpga: Fix with the correct polling on bit is set

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Commit 2baa997240 ("arm: socfpga: Add FPGA driver support for Arria 10")
Polling on wrong cleared bit. Fix with correct polling on bit is set.

Fixes: 2baa997240 ("arm: socfpga: Add FPGA driver support for Arria 10")

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
This commit is contained in:
Tien Fong Chee 2017-12-05 15:57:58 +08:00 committed by Marek Vasut
parent d2a1f120cf
commit 4ae87a83a6
1 changed files with 5 additions and 5 deletions
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10
drivers/fpga/socfpga_arria10.c
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@ -111,12 +111,12 @@ static int wait_for_nconfig_pin_and_nstatus_pin(void)
unsigned long mask = ALT_FPGAMGR_IMGCFG_STAT_F2S_NCONFIG_PIN_SET_MSK |
ALT_FPGAMGR_IMGCFG_STAT_F2S_NSTATUS_PIN_SET_MSK;
/* Poll until f2s_nconfig_pin and f2s_nstatus_pin; loop until de-asserted,
* timeout at 1000ms
/*
* Poll until f2s_nconfig_pin and f2s_nstatus_pin; loop until
* de-asserted, timeout at 1000ms
*/
return wait_for_bit_le32(&fpga_manager_base->imgcfg_stat,
mask,
false, FPGA_TIMEOUT_MSEC, false);
return wait_for_bit_le32(&fpga_manager_base->imgcfg_stat, mask,
true, FPGA_TIMEOUT_MSEC, false);
}
static int wait_for_f2s_nstatus_pin(unsigned long value)