Add support for 64-bit MIPS to examples/standalone
Signed-off-by: Stanislav Galabov <sgalabov@gmail.com>
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@ -65,6 +65,23 @@ gd_t *global_data;
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: : "i"(offsetof(gd_t, jt)), "i"(FO(x)) : "ip");
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#endif
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#elif defined(CONFIG_MIPS)
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#ifdef CONFIG_CPU_MIPS64
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/*
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* k0 ($26) holds the pointer to the global_data; t9 ($25) is a call-
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* clobbered register that is also used to set gp ($26). Note that the
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* jr instruction also executes the instruction immediately following
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* it; however, GCC/mips generates an additional `nop' after each asm
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* statement
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*/
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#define EXPORT_FUNC(f, a, x, ...) \
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asm volatile ( \
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" .globl " #x "\n" \
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#x ":\n" \
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" ld $25, %0($26)\n" \
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" ld $25, %1($25)\n" \
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" jr $25\n" \
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: : "i"(offsetof(gd_t, jt)), "i"(FO(x)) : "t9");
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#else
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/*
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* k0 ($26) holds the pointer to the global_data; t9 ($25) is a call-
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* clobbered register that is also used to set gp ($26). Note that the
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@ -80,6 +97,7 @@ gd_t *global_data;
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" lw $25, %1($25)\n" \
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" jr $25\n" \
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: : "i"(offsetof(gd_t, jt)), "i"(FO(x)) : "t9");
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#endif
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#elif defined(CONFIG_NIOS2)
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/*
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* gp holds the pointer to the global_data, r8 is call-clobbered
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