ARM: dts: omap3-devkit8000: Add support for Devkit8000
This commit adds OMAP3 BeagleBoard devicetree files from Linux v5.16.0. This commit fixes CONFIG_DM_MMC warning. v3: patch clean-up Signed-off-by: Anthoine Bourgeois <anthoine.bourgeois@gmail.com>
This commit is contained in:
Anthoine Bourgeois
Tom Rini
parent
52af0101be
commit
49df685d32
@ -1069,6 +1069,8 @@ dtb-$(CONFIG_TARGET_OMAP3_BEAGLE) += \
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omap3-beagle-xm.dtb \
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omap3-beagle.dtb
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dtb-$(CONFIG_TARGET_DEVKIT8000) += omap3-devkit8000.dtb
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dtb-$(CONFIG_TARGET_OMAP3_IGEP00X0) += \
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omap3-igep0020.dtb
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14
arch/arm/dts/omap3-devkit8000-u-boot.dtsi
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14
arch/arm/dts/omap3-devkit8000-u-boot.dtsi
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@ -0,0 +1,14 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* U-Boot additions
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*
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* (C) Copyright 2017 Derald D. Woods <woods.technical@gmail.com>
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*/
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#include "omap3-u-boot.dtsi"
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/ {
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chosen {
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stdout-path = &uart3;
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};
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};
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349
arch/arm/dts/omap3-devkit8000.dts
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349
arch/arm/dts/omap3-devkit8000.dts
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@ -0,0 +1,349 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Author: Anthoine Bourgeois <anthoine.bourgeois@gmail.com>
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*/
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/dts-v1/;
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#include "omap34xx.dtsi"
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/ {
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model = "TimLL OMAP3 Devkit8000";
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compatible = "timll,omap3-devkit8000", "ti,omap3430", "ti,omap3";
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aliases {
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display1 = &dvi0;
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display2 = &tv0;
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};
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memory@80000000 {
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device_type = "memory";
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reg = <0x80000000 0x10000000>; /* 256 MB */
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};
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leds {
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compatible = "gpio-leds";
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heartbeat {
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label = "devkit8000::led1";
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gpios = <&gpio6 26 GPIO_ACTIVE_HIGH>; /* 186 -> LED1 */
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default-state = "on";
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linux,default-trigger = "heartbeat";
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};
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mmc {
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label = "devkit8000::led2";
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gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 -> LED2 */
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default-state = "on";
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linux,default-trigger = "none";
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};
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usr {
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label = "devkit8000::led3";
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gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>; /* 164 -> LED3 */
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default-state = "on";
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linux,default-trigger = "usr";
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};
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pmu_stat {
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label = "devkit8000::pmu_stat";
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gpios = <&twl_gpio 19 GPIO_ACTIVE_HIGH>; /* LEDB */
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};
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};
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sound {
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compatible = "ti,omap-twl4030";
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ti,model = "devkit8000";
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ti,mcbsp = <&mcbsp2>;
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ti,audio-routing =
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"Ext Spk", "PREDRIVEL",
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"Ext Spk", "PREDRIVER",
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"MAINMIC", "Main Mic",
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"Main Mic", "Mic Bias 1";
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};
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tfp410: encoder0 {
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compatible = "ti,tfp410";
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powerdown-gpios = <&twl_gpio 7 GPIO_ACTIVE_LOW>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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tfp410_in: endpoint {
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remote-endpoint = <&dpi_dvi_out>;
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};
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};
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port@1 {
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reg = <1>;
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tfp410_out: endpoint {
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remote-endpoint = <&dvi_connector_in>;
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};
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};
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};
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};
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dvi0: connector0 {
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compatible = "dvi-connector";
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label = "dvi";
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digital;
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ddc-i2c-bus = <&i2c2>;
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port {
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dvi_connector_in: endpoint {
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remote-endpoint = <&tfp410_out>;
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};
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};
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};
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tv0: connector1 {
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compatible = "svideo-connector";
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label = "tv";
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port {
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tv_connector_in: endpoint {
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remote-endpoint = <&venc_out>;
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};
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};
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};
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};
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&i2c1 {
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clock-frequency = <2600000>;
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twl: twl@48 {
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reg = <0x48>;
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interrupts = <7>; /* SYS_NIRQ cascaded to intc */
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twl_audio: audio {
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compatible = "ti,twl4030-audio";
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codec {
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};
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};
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};
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};
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&i2c2 {
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clock-frequency = <400000>;
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};
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&i2c3 {
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status = "disabled";
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};
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#include "twl4030.dtsi"
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#include "twl4030_omap3.dtsi"
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&mmc1 {
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vmmc-supply = <&vmmc1>;
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vqmmc-supply = <&vsim>;
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bus-width = <8>;
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};
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&mmc2 {
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status = "disabled";
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};
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&mmc3 {
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status = "disabled";
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};
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&twl_gpio {
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ti,use-leds;
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/*
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* pulldowns:
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* BIT(1), BIT(2), BIT(6), BIT(7), BIT(8), BIT(13)
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* BIT(15), BIT(16), BIT(17)
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*/
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ti,pulldowns = <0x03a1c6>;
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};
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&wdt2 {
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status = "disabled";
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};
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&mcbsp2 {
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status = "okay";
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};
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&gpmc {
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ranges = <0 0 0x30000000 0x1000000 /* CS0: 16MB for NAND */
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6 0 0x2c000000 0x1000000>; /* CS6: 16MB for DM9000 */
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nand@0,0 {
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compatible = "ti,omap2-nand";
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reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
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interrupt-parent = <&gpmc>;
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interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
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<1 IRQ_TYPE_NONE>; /* termcount */
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nand-bus-width = <16>;
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gpmc,device-width = <2>;
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ti,nand-ecc-opt = "sw";
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gpmc,sync-clk-ps = <0>;
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gpmc,cs-on-ns = <0>;
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gpmc,cs-rd-off-ns = <44>;
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gpmc,cs-wr-off-ns = <44>;
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gpmc,adv-on-ns = <6>;
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gpmc,adv-rd-off-ns = <34>;
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gpmc,adv-wr-off-ns = <44>;
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gpmc,we-off-ns = <40>;
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gpmc,oe-off-ns = <54>;
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gpmc,access-ns = <64>;
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gpmc,rd-cycle-ns = <82>;
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gpmc,wr-cycle-ns = <82>;
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gpmc,wr-access-ns = <40>;
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gpmc,wr-data-mux-bus-ns = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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x-loader@0 {
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label = "X-Loader";
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reg = <0 0x80000>;
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};
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bootloaders@80000 {
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label = "U-Boot";
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reg = <0x80000 0x1e0000>;
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};
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bootloaders_env@260000 {
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label = "U-Boot Env";
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reg = <0x260000 0x20000>;
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};
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kernel@280000 {
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label = "Kernel";
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reg = <0x280000 0x400000>;
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};
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filesystem@680000 {
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label = "File System";
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reg = <0x680000 0xf980000>;
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};
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};
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ethernet@6,0 {
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compatible = "davicom,dm9000";
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reg = <6 0x000 2
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6 0x400 2>; /* CS6, offset 0 and 0x400, IO size 2 */
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bank-width = <2>;
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interrupt-parent = <&gpio1>;
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interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
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davicom,no-eeprom;
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gpmc,mux-add-data = <0>;
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gpmc,device-width = <1>;
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gpmc,wait-pin = <0>;
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gpmc,cycle2cycle-samecsen;
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gpmc,cycle2cycle-diffcsen;
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gpmc,cs-on-ns = <6>;
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gpmc,cs-rd-off-ns = <180>;
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gpmc,cs-wr-off-ns = <180>;
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gpmc,adv-on-ns = <0>;
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gpmc,adv-rd-off-ns = <18>;
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gpmc,adv-wr-off-ns = <48>;
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gpmc,oe-on-ns = <54>;
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gpmc,oe-off-ns = <168>;
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gpmc,we-on-ns = <54>;
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gpmc,we-off-ns = <168>;
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gpmc,rd-cycle-ns = <186>;
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gpmc,wr-cycle-ns = <186>;
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gpmc,access-ns = <144>;
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gpmc,page-burst-access-ns = <24>;
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gpmc,bus-turnaround-ns = <90>;
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gpmc,cycle2cycle-delay-ns = <90>;
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gpmc,wait-monitoring-ns = <0>;
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gpmc,clk-activation-ns = <0>;
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gpmc,wr-data-mux-bus-ns = <0>;
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gpmc,wr-access-ns = <0>;
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};
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};
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&omap3_pmx_core {
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dss_dpi_pins: pinmux_dss_dpi_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
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OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
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OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
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OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
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OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */
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OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */
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OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */
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OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */
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OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */
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OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */
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OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
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OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
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OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
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OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
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OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
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OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
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OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
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OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
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OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
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OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
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OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */
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OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */
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OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0) /* dss_data18.dss_data18 */
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OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0) /* dss_data19.dss_data19 */
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OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0) /* dss_data20.dss_data20 */
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OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */
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OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */
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OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */
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>;
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};
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};
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&vpll1 {
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/* Needed for DSS */
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regulator-name = "vdds_dsi";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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&dss {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&dss_dpi_pins>;
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vdds_dsi-supply = <&vpll1>;
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vdda_dac-supply = <&vdac>;
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port {
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#address-cells = <1>;
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#size-cells = <0>;
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dpi_dvi_out: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&tfp410_in>;
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data-lines = <24>;
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};
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endpoint@1 {
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reg = <1>;
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};
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};
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};
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&venc {
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status = "okay";
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vdda-supply = <&vdac>;
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port {
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venc_out: endpoint {
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remote-endpoint = <&tv_connector_in>;
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ti,channels = <2>;
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};
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};
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};
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@ -2,21 +2,26 @@ CONFIG_ARM=y
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CONFIG_ARCH_OMAP2PLUS=y
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CONFIG_SYS_TEXT_BASE=0x80100000
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CONFIG_SYS_MALLOC_LEN=0x40000
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CONFIG_SYS_MALLOC_F_LEN=0x400
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CONFIG_SYS_MALLOC_F_LEN=0x4000
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CONFIG_NR_DRAM_BANKS=2
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CONFIG_DEFAULT_DEVICE_TREE="omap3-devkit8000"
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CONFIG_SPL_TEXT_BASE=0x40200000
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CONFIG_TARGET_DEVKIT8000=y
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CONFIG_SPL_SYS_MALLOC_F_LEN=0x400
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CONFIG_SPL=y
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CONFIG_DISTRO_DEFAULTS=y
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CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
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CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00
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CONFIG_BOOTCOMMAND="run autoboot"
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CONFIG_USE_PREBOOT=y
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CONFIG_SYS_CONSOLE_INFO_QUIET=y
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CONFIG_SPL_MAX_SIZE=0xec00
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CONFIG_SPL_BSS_START_ADDR=0x80000500
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CONFIG_SPL_SYS_MALLOC_SIMPLE=y
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CONFIG_SYS_SPL_MALLOC=y
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CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y
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CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80208000
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# CONFIG_SPL_FS_EXT4 is not set
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CONFIG_SPL_NAND_DRIVERS=y
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CONFIG_SPL_NAND_ECC=y
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CONFIG_SPL_NAND_SIMPLE=y
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@ -31,8 +36,8 @@ CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=8
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CONFIG_SYS_MAXARGS=64
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# CONFIG_CMD_IMI is not set
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CONFIG_CMD_SPL=y
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CONFIG_CMD_SPL_NAND_OFS=0x680000
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CONFIG_CMD_SPL_WRITE_SIZE=0x400
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CONFIG_CMD_SPL_NAND_OFS=0x280000
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CONFIG_CMD_SPL_WRITE_SIZE=0x20000
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# CONFIG_CMD_FLASH is not set
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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@ -50,12 +55,20 @@ CONFIG_JFFS2_PART_SIZE=0xF980000
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CONFIG_CMD_MTDPARTS=y
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CONFIG_MTDIDS_DEFAULT="nand0=nand"
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CONFIG_MTDPARTS_DEFAULT="mtdparts=nand:512k(x-loader),1920k(u-boot),128k(u-boot-env),4m(kernel),-(fs)"
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# CONFIG_ISO_PARTITION is not set
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# CONFIG_SPL_EFI_PARTITION is not set
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CONFIG_OF_CONTROL=y
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_OF_SPL_REMOVE_PROPS="clocks clock-names interrupt-parent"
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CONFIG_ENV_OVERWRITE=y
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CONFIG_ENV_IS_IN_NAND=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_VERSION_VARIABLE=y
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CONFIG_NET_RETRY_COUNT=20
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CONFIG_BOOTP_SEND_HOSTNAME=y
|
||||
CONFIG_SPL_DM=y
|
||||
CONFIG_SPL_DM_SEQ_ALIAS=y
|
||||
CONFIG_SPL_OF_TRANSLATE=y
|
||||
CONFIG_SYS_I2C_LEGACY=y
|
||||
CONFIG_SPL_SYS_I2C_LEGACY=y
|
||||
CONFIG_TWL4030_LED=y
|
||||
@ -71,6 +84,4 @@ CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
|
||||
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
|
||||
CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
|
||||
CONFIG_DRIVER_DM9000=y
|
||||
CONFIG_CONS_INDEX=3
|
||||
CONFIG_JFFS2_NAND=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
|
||||
@ -14,17 +14,6 @@
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
/* High Level Configuration Options */
|
||||
|
||||
/*
|
||||
* 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
|
||||
* 64 bytes before this address should be set aside for u-boot.img's
|
||||
* header. That is 0x800FFFC0--0x80100000 should not be used for any
|
||||
* other needs.
|
||||
*/
|
||||
|
||||
/* Physical Memory Map */
|
||||
|
||||
#include <configs/ti_omap3_common.h>
|
||||
|
||||
/* Hardware drivers */
|
||||
@ -40,9 +29,12 @@
|
||||
|
||||
/* BOOTP/DHCP options */
|
||||
|
||||
#define MEM_LAYOUT_ENV_SETTINGS \
|
||||
DEFAULT_LINUX_BOOT_ENV
|
||||
|
||||
/* Environment information */
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"loadaddr=0x82000000\0" \
|
||||
MEM_LAYOUT_ENV_SETTINGS \
|
||||
"console=ttyO2,115200n8\0" \
|
||||
"mmcdev=0\0" \
|
||||
"vram=12M\0" \
|
||||
|
||||
Loading…
Reference in New Issue
Block a user