ARC: Move IOC enabling to compile-time options
Use CONFIG_ARC_DBG_IOC_ENABLE Kconfig option instead of ioc_enable global variable. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
This commit is contained in:
committed by
Alexey Brodkin
parent
246ba284ec
commit
48b04832d8
@@ -116,6 +116,24 @@ config SYS_DCACHE_OFF
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bool "Do not use Data Cache"
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bool "Do not use Data Cache"
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default n
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default n
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menuconfig ARC_DBG
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bool "ARC debugging"
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default n
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if ARC_DBG
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config ARC_DBG_IOC_ENABLE
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bool "Enable IO coherency unit"
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depends on CPU_ARCHS38
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default n
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help
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Enable IO coherency unit to debug problems with caches and
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DMA peripherals.
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NOTE: as of today linux will not work properly if this option
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is enabled in u-boot!
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endif
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choice
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choice
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prompt "Target select"
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prompt "Target select"
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default TARGET_AXS103
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default TARGET_AXS103
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@@ -32,6 +32,11 @@
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void cache_init(void);
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void cache_init(void);
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void flush_n_invalidate_dcache_all(void);
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void flush_n_invalidate_dcache_all(void);
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static const inline int is_ioc_enabled(void)
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{
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return IS_ENABLED(CONFIG_ARC_DBG_IOC_ENABLE);
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}
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#endif /* __ASSEMBLY__ */
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#endif /* __ASSEMBLY__ */
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#endif /* __ASM_ARC_CACHE_H */
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#endif /* __ASM_ARC_CACHE_H */
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@@ -107,18 +107,8 @@ DECLARE_GLOBAL_DATA_PTR;
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#define SLC_CTRL_BUSY 0x100
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#define SLC_CTRL_BUSY 0x100
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#define SLC_CTRL_RGN_OP_INV 0x200
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#define SLC_CTRL_RGN_OP_INV 0x200
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/*
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* By default that variable will fall into .bss section.
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* But .bss section is not relocated and so it will be initilized before
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* relocation but will be used after being zeroed.
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*/
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#define CACHE_LINE_MASK (~(gd->arch.l1_line_sz - 1))
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#define CACHE_LINE_MASK (~(gd->arch.l1_line_sz - 1))
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bool ioc_exists __section(".data") = false;
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/* To force enable IOC set ioc_enable to 'true' */
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bool ioc_enable __section(".data") = false;
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static inline bool pae_exists(void)
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static inline bool pae_exists(void)
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{
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{
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/* TODO: should we compare mmu version from BCR and from CONFIG? */
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/* TODO: should we compare mmu version from BCR and from CONFIG? */
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@@ -162,6 +152,30 @@ static inline bool slc_exists(void)
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return false;
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return false;
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}
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}
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static inline bool ioc_exists(void)
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{
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if (is_isa_arcv2()) {
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union bcr_clust_cfg cbcr;
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cbcr.word = read_aux_reg(ARC_BCR_CLUSTER);
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return cbcr.fields.c;
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}
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return false;
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}
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static inline bool ioc_enabled(void)
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{
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/*
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* We check only CONFIG option instead of IOC HW state check as IOC
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* must be disabled by default.
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*/
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if (is_ioc_enabled())
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return ioc_exists();
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return false;
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}
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static void __slc_entire_op(const int op)
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static void __slc_entire_op(const int op)
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{
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{
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unsigned int ctrl;
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unsigned int ctrl;
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@@ -295,17 +309,12 @@ static void read_decode_cache_bcr_arcv2(void)
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#ifdef CONFIG_ISA_ARCV2
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#ifdef CONFIG_ISA_ARCV2
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union bcr_slc_cfg slc_cfg;
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union bcr_slc_cfg slc_cfg;
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union bcr_clust_cfg cbcr;
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if (slc_exists()) {
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if (slc_exists()) {
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slc_cfg.word = read_aux_reg(ARC_AUX_SLC_CONFIG);
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slc_cfg.word = read_aux_reg(ARC_AUX_SLC_CONFIG);
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gd->arch.slc_line_sz = (slc_cfg.fields.lsz == 0) ? 128 : 64;
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gd->arch.slc_line_sz = (slc_cfg.fields.lsz == 0) ? 128 : 64;
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}
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}
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cbcr.word = read_aux_reg(ARC_BCR_CLUSTER);
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if (cbcr.fields.c && ioc_enable)
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ioc_exists = true;
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#endif /* CONFIG_ISA_ARCV2 */
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#endif /* CONFIG_ISA_ARCV2 */
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}
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}
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@@ -339,7 +348,7 @@ void cache_init(void)
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if (is_isa_arcv2())
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if (is_isa_arcv2())
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read_decode_cache_bcr_arcv2();
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read_decode_cache_bcr_arcv2();
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if (is_isa_arcv2() && ioc_exists)
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if (is_isa_arcv2() && ioc_enabled())
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arc_ioc_setup();
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arc_ioc_setup();
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if (is_isa_arcv2() && slc_exists())
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if (is_isa_arcv2() && slc_exists())
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@@ -511,10 +520,10 @@ void invalidate_dcache_range(unsigned long start, unsigned long end)
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* ARCv2 && no IOC -> call __dc_line_op; call __slc_rgn_op
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* ARCv2 && no IOC -> call __dc_line_op; call __slc_rgn_op
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* ARCv2 && IOC enabled -> nothing
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* ARCv2 && IOC enabled -> nothing
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*/
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*/
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if (!is_isa_arcv2() || !ioc_exists)
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if (!is_isa_arcv2() || !ioc_enabled())
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__dc_line_op(start, end - start, OP_INV);
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__dc_line_op(start, end - start, OP_INV);
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if (is_isa_arcv2() && !ioc_exists)
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if (is_isa_arcv2() && !ioc_enabled())
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__slc_rgn_op(start, end - start, OP_INV);
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__slc_rgn_op(start, end - start, OP_INV);
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}
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}
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@@ -528,10 +537,10 @@ void flush_dcache_range(unsigned long start, unsigned long end)
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* ARCv2 && no IOC -> call __dc_line_op; call __slc_rgn_op
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* ARCv2 && no IOC -> call __dc_line_op; call __slc_rgn_op
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* ARCv2 && IOC enabled -> nothing
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* ARCv2 && IOC enabled -> nothing
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*/
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*/
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if (!is_isa_arcv2() || !ioc_exists)
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if (!is_isa_arcv2() || !ioc_enabled())
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__dc_line_op(start, end - start, OP_FLUSH);
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__dc_line_op(start, end - start, OP_FLUSH);
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if (is_isa_arcv2() && !ioc_exists)
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if (is_isa_arcv2() && !ioc_enabled())
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__slc_rgn_op(start, end - start, OP_FLUSH);
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__slc_rgn_op(start, end - start, OP_FLUSH);
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}
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}
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