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exynos: Add support for exynos5420 i2s pinmux

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Allow setting the i2s pinmux correctly on exyno5420 so that i2c can be
used on that SoC. Also rename EXYNOS_AUDSS to something consistent with
other naming.

Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Simon Glass 2018-12-10 10:37:41 -07:00
parent cf9007ce88
commit 482e585bdf
3 changed files with 39 additions and 2 deletions
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21
arch/arm/mach-exynos/clock.c
View File

@ -1317,6 +1317,19 @@ int exynos5_set_epll_clk(unsigned long rate)
return 0;
}
static int exynos5420_set_i2s_clk_source(void)
{
struct exynos5420_clock *clk =
(struct exynos5420_clock *)samsung_get_base_clock();
setbits_le32(&clk->src_top6, EXYNOS5420_CLK_SRC_MOUT_EPLL);
clrsetbits_le32(&clk->src_mau, EXYNOS5420_AUDIO0_SEL_MASK,
(EXYNOS5420_CLK_SRC_SCLK_EPLL));
setbits_le32(EXYNOS5_AUDIOSS_BASE, 1 << 0);
return 0;
}
int exynos5_set_i2s_clk_source(unsigned int i2s_id)
{
struct exynos5_clock *clk =
@ -1758,8 +1771,12 @@ int set_i2s_clk_prescaler(unsigned int src_frq, unsigned int dst_frq,
int set_i2s_clk_source(unsigned int i2s_id)
{
if (cpu_is_exynos5())
return exynos5_set_i2s_clk_source(i2s_id);
if (cpu_is_exynos5()) {
if (proid_is_exynos542x())
return exynos5420_set_i2s_clk_source();
else
return exynos5_set_i2s_clk_source(i2s_id);
}
return 0;
}

3
arch/arm/mach-exynos/include/mach/clock.h
View File

@ -1370,10 +1370,13 @@ struct set_epll_con_val {
#define AUDIO_1_RATIO_MASK 0x0f
#define AUDIO0_SEL_MASK 0xf
#define EXYNOS5420_AUDIO0_SEL_MASK (0x3 << 28)
#define AUDIO1_SEL_MASK 0xf
#define CLK_SRC_SCLK_EPLL 0x7
#define EXYNOS5420_CLK_SRC_SCLK_EPLL (0x6 << 28)
#define CLK_SRC_MOUT_EPLL (1<<12)
#define EXYNOS5420_CLK_SRC_MOUT_EPLL BIT(20)
#define AUDIO_CLKMUX_ASS (1<<0)
/* CON0 bit-fields */

17
arch/arm/mach-exynos/pinmux.c
View File

@ -378,6 +378,20 @@ static void exynos5_i2s_config(int peripheral)
}
}
static void exynos5420_i2s_config(int peripheral)
{
int i;
switch (peripheral) {
case PERIPH_ID_I2S0:
for (i = 0; i < 5; i++)
gpio_cfg_pin(EXYNOS5420_GPIO_Z0 + i,
S5P_GPIO_FUNC(0x02));
break;
}
}
void exynos5_spi_config(int peripheral)
{
int cfg = 0, pin = 0, i;
@ -550,6 +564,9 @@ static int exynos5420_pinmux_config(int peripheral, int flags)
case PERIPH_ID_I2C10:
exynos5420_i2c_config(peripheral);
break;
case PERIPH_ID_I2S0:
exynos5420_i2s_config(peripheral);
break;
case PERIPH_ID_PWM0:
gpio_cfg_pin(EXYNOS5420_GPIO_B20, S5P_GPIO_FUNC(2));
break;