armv8: ls1012ardb: clean up definitions for I2C IO expanders
This patch is to clean up definitions for I2C IO expanders. The value 0x10 of __SW_BOOT_EMU is wrong. It should be 0x2. Fixed it in this patch. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
This commit is contained in:
parent
70a131eb5a
commit
481fb01f41
@ -35,25 +35,25 @@ int checkboard(void)
|
||||
/* Initialize i2c early for Serial flash bank information */
|
||||
i2c_set_bus_num(0);
|
||||
|
||||
if (i2c_read(I2C_MUX_IO1_ADDR, 1, 1, &in1, 1) < 0) {
|
||||
if (i2c_read(I2C_MUX_IO_ADDR, I2C_MUX_IO_1, 1, &in1, 1) < 0) {
|
||||
printf("Error reading i2c boot information!\n");
|
||||
return 0; /* Don't want to hang() on this error */
|
||||
}
|
||||
|
||||
puts("Version");
|
||||
if ((in1 & (~__SW_REV_MASK)) == __SW_REV_A)
|
||||
if ((in1 & SW_REV_MASK) == SW_REV_A)
|
||||
puts(": RevA");
|
||||
else if ((in1 & (~__SW_REV_MASK)) == __SW_REV_B)
|
||||
else if ((in1 & SW_REV_MASK) == SW_REV_B)
|
||||
puts(": RevB");
|
||||
else
|
||||
puts(": unknown");
|
||||
|
||||
printf(", boot from QSPI");
|
||||
if ((in1 & (~__SW_BOOT_MASK)) == __SW_BOOT_EMU)
|
||||
if ((in1 & SW_BOOT_MASK) == SW_BOOT_EMU)
|
||||
puts(": emu\n");
|
||||
else if ((in1 & (~__SW_BOOT_MASK)) == __SW_BOOT_BANK1)
|
||||
else if ((in1 & SW_BOOT_MASK) == SW_BOOT_BANK1)
|
||||
puts(": bank1\n");
|
||||
else if ((in1 & (~__SW_BOOT_MASK)) == __SW_BOOT_BANK2)
|
||||
else if ((in1 & SW_BOOT_MASK) == SW_BOOT_BANK2)
|
||||
puts(": bank2\n");
|
||||
else
|
||||
puts("unknown\n");
|
||||
@ -152,7 +152,7 @@ int esdhc_status_fixup(void *blob, const char *compat)
|
||||
* 10 - eMMC Memory
|
||||
* 11 - SPI
|
||||
*/
|
||||
if (i2c_read(I2C_MUX_IO1_ADDR, 0, 1, &io, 1) < 0) {
|
||||
if (i2c_read(I2C_MUX_IO_ADDR, I2C_MUX_IO_0, 1, &io, 1) < 0) {
|
||||
printf("Error reading i2c boot information!\n");
|
||||
return 0; /* Don't want to hang() on this error */
|
||||
}
|
||||
|
@ -24,14 +24,16 @@
|
||||
* I2C IO expander
|
||||
*/
|
||||
|
||||
#define I2C_MUX_IO1_ADDR 0x24
|
||||
#define __SW_BOOT_MASK 0xFC
|
||||
#define __SW_BOOT_EMU 0x10
|
||||
#define __SW_BOOT_BANK1 0x00
|
||||
#define __SW_BOOT_BANK2 0x01
|
||||
#define __SW_REV_MASK 0x07
|
||||
#define __SW_REV_A 0xF8
|
||||
#define __SW_REV_B 0xF0
|
||||
#define I2C_MUX_IO_ADDR 0x24
|
||||
#define I2C_MUX_IO_0 0
|
||||
#define I2C_MUX_IO_1 1
|
||||
#define SW_BOOT_MASK 0x03
|
||||
#define SW_BOOT_EMU 0x02
|
||||
#define SW_BOOT_BANK1 0x00
|
||||
#define SW_BOOT_BANK2 0x01
|
||||
#define SW_REV_MASK 0xF8
|
||||
#define SW_REV_A 0xF8
|
||||
#define SW_REV_B 0xF0
|
||||
|
||||
/* MMC */
|
||||
#ifdef CONFIG_MMC
|
||||
|
Loading…
Reference in New Issue
Block a user