board: freescale: imx93_evk: support ethernet
Add ethernet support Signed-off-by: Peng Fan <peng.fan@nxp.com>
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@ -7,6 +7,7 @@
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#define __ASM_ARCH_IMX9_REGS_H__
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#define ARCH_MXC
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#define FEC_QUIRK_ENET_MAC
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#define IOMUXC_BASE_ADDR 0x443C0000UL
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#define CCM_BASE_ADDR 0x44450000UL
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@ -39,6 +40,12 @@
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#define SRC_MIX_SLICE_FUNC_STAT_ISO_STAT BIT(4)
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#define SRC_MIX_SLICE_FUNC_STAT_MEM_STAT BIT(12)
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#define BCTRL_GPR_ENET_QOS_INTF_MODE_MASK GENMASK(3, 1)
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#define BCTRL_GPR_ENET_QOS_INTF_SEL_MII (0x0 << 1)
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#define BCTRL_GPR_ENET_QOS_INTF_SEL_RMII (0x4 << 1)
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#define BCTRL_GPR_ENET_QOS_INTF_SEL_RGMII (0x1 << 1)
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#define BCTRL_GPR_ENET_QOS_CLK_GEN_EN (0x1 << 0)
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#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
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#include <asm/types.h>
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#include <stdbool.h>
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@ -38,8 +38,40 @@ int board_early_init_f(void)
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return 0;
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}
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static int setup_fec(void)
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{
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return set_clk_enet(ENET_125MHZ);
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}
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int board_phy_config(struct phy_device *phydev)
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{
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if (phydev->drv->config)
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phydev->drv->config(phydev);
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return 0;
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}
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static int setup_eqos(void)
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{
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struct blk_ctrl_wakeupmix_regs *bctrl =
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(struct blk_ctrl_wakeupmix_regs *)BLK_CTRL_WAKEUPMIX_BASE_ADDR;
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/* set INTF as RGMII, enable RGMII TXC clock */
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clrsetbits_le32(&bctrl->eqos_gpr,
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BCTRL_GPR_ENET_QOS_INTF_MODE_MASK,
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BCTRL_GPR_ENET_QOS_INTF_SEL_RGMII | BCTRL_GPR_ENET_QOS_CLK_GEN_EN);
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return set_clk_eqos(ENET_125MHZ);
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}
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int board_init(void)
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{
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if (CONFIG_IS_ENABLED(FEC_MXC))
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setup_fec();
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if (CONFIG_IS_ENABLED(DWC_ETH_QOS))
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setup_eqos();
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return 0;
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}
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@ -75,6 +75,7 @@ CONFIG_ENV_IS_IN_MMC=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_SYS_MMC_ENV_DEV=1
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CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_SPL_DM=y
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CONFIG_REGMAP=y
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CONFIG_SYSCON=y
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@ -89,6 +90,14 @@ CONFIG_MMC_UHS_SUPPORT=y
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CONFIG_MMC_HS400_ES_SUPPORT=y
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CONFIG_MMC_HS400_SUPPORT=y
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CONFIG_FSL_USDHC=y
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CONFIG_PHY_REALTEK=y
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CONFIG_DM_ETH=y
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CONFIG_DM_ETH_PHY=y
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CONFIG_PHY_GIGE=y
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CONFIG_DWC_ETH_QOS=y
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CONFIG_DWC_ETH_QOS_IMX=y
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CONFIG_FEC_MXC=y
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CONFIG_MII=y
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CONFIG_PINCTRL=y
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CONFIG_SPL_PINCTRL=y
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CONFIG_PINCTRL_IMX93=y
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