Merge tag 'xilinx-for-v2021.01-v2' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2021.01-v2 common: - Add support for 64bit loadables from SPL xilinx: - Update documentation and record ownership - Enable eeprom board detection based legacy and fru formats - Add support for FRU format microblaze: - Optimize low level ASM code - Enable SPI/I2C - Enable distro boot zynq: - Add support for Zturn V5 zynqmp: - Improve silicon detection code - Enable several kconfig options - Align DT with the latest state - Enabling security commands - Enable and support FPGA loading from SPL - Optimize xilinx_pm_request() calling versal: - Some DTs/Kconfig/defconfig alignments - Add binding header for clock and power zynq-sdhci: - Add support for tap delay programming zynq-spi/zynq-qspi: - Use clock framework for getting clocks xilinx-spi: - Fix some code issues (unused variables) serial: - Check return value from clock functions in pl01x
This commit is contained in:
@@ -8,3 +8,5 @@ Xilinx
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xilinx
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zynq
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zynqmp
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zynqmp-r5
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@@ -10,18 +10,28 @@ kernel.
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* ata
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- Documentation/devicetree/bindings/ata/ahci-ceva.txt
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* clock
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- Documentation/devicetree/bindings/clock/xlnx,zynqmp-clk.txt
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* firmware
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- Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.txt
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* fpga
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- Documentation/devicetree/bindings/fpga/xlnx,zynqmp-pcap-fpga.txt
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* gpio
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- Documentation/devicetree/bindings/gpio/gpio-xilinx.txt
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- Documentation/devicetree/bindings/gpio/gpio-zynq.txt
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* i2c
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- Documentation/devicetree/bindings/i2c/i2c-xiic.txt
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- Documentation/devicetree/bindings/i2c/i2c-cadence.txt
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- Documentation/devicetree/bindings/i2c/xlnx,xps-iic-2.00.a.yaml
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- Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml
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* mmc
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- Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
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- Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml
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* net
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- Documentation/devicetree/bindings/net/macb.txt
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- Documentation/devicetree/bindings/net/xilinx_axienet.txt
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- Documentation/devicetree/bindings/net/xilinx_emaclite.txt
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* nvmem
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- Documentation/devicetree/bindings/nvmem/xlnx,zynqmp-nvmem.txt
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* power
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- Documentation/devicetree/bindings/power/reset/xlnx,zynqmp-power.txt
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* serial
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- Documentation/devicetree/bindings/serial/cdns,uart.txt
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- Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.txt
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@@ -83,7 +83,7 @@ Mainline status
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---------------
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- Added basic board configurations support.
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- Added zynq u-boot bsp code - arch/arm/cpu/armv7/zynq
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- Added zynq u-boot bsp code - arch/arm/mach-zynq
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- Added zynq boards named - zc70x, zed, microzed, zc770_xm010/xm011/xm012/xm013
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- Added zynq drivers:
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@@ -99,11 +99,6 @@ Mainline status
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- Added basic FDT support for zynq boards
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- d-cache support for zynq_gem.c
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TODO
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----
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Add FDT support on individual drivers
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* [1] http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC702-G.htm
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* [2] http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC706-G.htm
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* [3] http://zedboard.org/product/zedboard
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137
doc/board/xilinx/zynqmp-r5.rst
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137
doc/board/xilinx/zynqmp-r5.rst
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@@ -0,0 +1,137 @@
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.. SPDX-License-Identifier: GPL-2.0
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.. (C) Copyright 2020 Xilinx, Inc.
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ZYNQMP-R5
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=========
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About this
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----------
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This document describes the information about Xilinx Zynq UltraScale+ MPSOC
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U-Boot Cortex R5 support.
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ZynqMP R5 boards
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----------------
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* zynqmp-r5 - U-Boot running on RPU Cortex-R5
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Building
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--------
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configure and build armv7 toolchain::
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$ make xilinx_zynqmp_r5_defconfig
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$ make
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Notes
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^^^^^
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Output fragment is u-boot.
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Loading
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-------
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ZynqMP R5 U-Boot was created for supporting loading OS on RPU. There are two
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ways how to start U-Boot on R5.
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Bootgen
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^^^^^^^
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The first way is to use Xilinx FSBL (First stage
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bootloader) to load u-boot and start it. The following bif can be used for boot
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image generation via Xilinx bootgen utility::
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the_ROM_image:
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{
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[bootloader,destination_cpu=r5-0] fsbl_rpu.elf
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[destination_cpu=r5-0]u-boot.elf
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}
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Bootgen command for building boot.bin::
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bootgen -image <bif>.bif -r -w -o i boot.bin
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U-Boot cpu command
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^^^^^^^^^^^^^^^^^^
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The second way to load U-Boot to Cortex R5 is from U-Boot running on A53 as is
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visible from the following log::
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U-Boot SPL 2020.10-rc4-00090-g801b3d5c5757 (Sep 15 2020 - 14:07:24 +0200)
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PMUFW: v1.1
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Loading new PMUFW cfg obj (2024 bytes)
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EL Level: EL3
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Multiboot: 0
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Trying to boot from MMC2
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spl: could not initialize mmc. error: -19
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Trying to boot from MMC1
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spl_load_image_fat_os: error reading image u-boot.bin, err - -2
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NOTICE: ATF running on XCZU7EG/EV/silicon v4/RTL5.1 at 0xfffea000
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NOTICE: BL31: v2.2(release):v2.2-614-ged9dc512fb9c
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NOTICE: BL31: Built : 09:32:09, Mar 13 2020
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U-Boot 2020.10-rc4-00090-g801b3d5c5757 (Sep 15 2020 - 14:07:24 +0200)
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Model: ZynqMP ZCU104 RevC
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Board: Xilinx ZynqMP
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DRAM: 2 GiB
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PMUFW: v1.1
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EL Level: EL2
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Chip ID: zu7e
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WDT: Started with servicing (60s timeout)
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NAND: 0 MiB
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MMC: mmc@ff170000: 0
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Loading Environment from FAT... *** Warning - bad CRC, using default environment
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In: serial
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Out: serial
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Err: serial
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Bootmode: LVL_SHFT_SD_MODE1
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Reset reason: SOFT
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Net:
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ZYNQ GEM: ff0e0000, mdio bus ff0e0000, phyaddr 12, interface rgmii-id
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eth0: ethernet@ff0e0000
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Hit any key to stop autoboot: 0
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ZynqMP> setenv autoload no
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ZynqMP> dhcp
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BOOTP broadcast 1
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DHCP client bound to address 192.168.0.167 (8 ms)
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ZynqMP> tftpboot 20000000 192.168.0.105:u-boot-r5-2.elf
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Using ethernet@ff0e0000 device
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TFTP from server 192.168.0.105; our IP address is 192.168.0.167
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Filename 'u-boot-r5-2.elf'.
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Load address: 0x20000000
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Loading: #################################################################
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#################################################################
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#################################################################
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#################################################################
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#################################################################
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#################################################################
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################
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376 KiB/s
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done
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Bytes transferred = 2075464 (1fab48 hex)
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ZynqMP> setenv autostart no
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ZynqMP> bootelf -p 20000000
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ZynqMP> cpu 4 release 10000000 lockstep
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Using TCM jump trampoline for address 0x10000000
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R5 lockstep mode
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ZynqMP>
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Then on second uart you can see U-Boot up and running on R5::
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U-Boot 2020.10-rc4-00071-g7045622cc9ba (Sep 16 2020 - 13:38:53 +0200)
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Model: Xilinx ZynqMP R5
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DRAM: 512 MiB
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MMC:
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In: serial@ff010000
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Out: serial@ff010000
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Err: serial@ff010000
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Net: No ethernet found.
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ZynqMP r5>
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Please make sure MIO pins for uart are properly configured to see output.
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115
doc/board/xilinx/zynqmp.rst
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115
doc/board/xilinx/zynqmp.rst
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@@ -0,0 +1,115 @@
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.. SPDX-License-Identifier: GPL-2.0
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.. (C) Copyright 2020 Xilinx, Inc.
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ZYNQMP
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======
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About this
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----------
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This document describes the information about Xilinx Zynq UltraScale+ MPSOC
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U-Boot support. Core support is available in arch/arm/mach-zynqmp folder.
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ZynqMP boards
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-------------
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* zcu100 (ultra96 v1), zcu102, zcu104, zcu106 - Evaluation boards
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* zc1232 - Characterization boards
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* zcu111, zcu208, zcu216 - RFSOC evaluation boards
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* zcu1254, zcu1275, zcu1285 - RFSOC characterization boards
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* a2197 - System Controller on Versal boards
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* mini - Mini U-Boot running out of OCM
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* zc1751 - Characterization Processor boards
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- zc1751-xm015-dc1
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- zc1751-xm016-dc2
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- zc1751-xm017-dc3
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- zc1751-xm018-dc4
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- zc1751-xm019-dc5
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Building
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--------
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Configure and build for zcu102 board::
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$ source arm64 toolchain
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$ export DEVICE_TREE=zynqmp-zcu102-revA
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$ make xilinx_zynqmp_virt_defconfig
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$ make
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U-Boot SPL flow
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---------------
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For getting U-Boot SPL flow up and running it is necessary to do some additional
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steps because booting device requires external images which are not the part of
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U-Boot repository.
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PMU firmware
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^^^^^^^^^^^^
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The Platform Management Unit (PMU) RAM can be loaded with a firmware (PMU
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Firmware) at run-time and can be used to extend or customize the functionality
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of PMU. The PMU firmware is the part of boot image (boot.bin) and it is
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automatically loaded by BootROM. boot.bin can be directly generated by mkimage
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tool as the part of make. If you want to create boot.bin with PMU Firmware
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include please point CONFIG_PMUFW_INIT_FILE to PMU firmware binary. For example:::
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CONFIG_PMUFW_INIT_FILE="<path>/pmu.bin"
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If you see below message you need to load PMU Firmware::
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PMUFW is not found - Please load it!
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The second external blob is PMU Configuration object which is object which is
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passed from U-Boot SPL to PMU Firmware for initial system configuration. PMU
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configuration object is the part of U-Boot SPL image. For pointing to this
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object please use CONFIG_ZYNQMP_SPL_PM_CFG_OBJ_FILE symbol. For example:::
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CONFIG_ZYNQMP_SPL_PM_CFG_OBJ_FILE="<path>/pmu_obj.bin"
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PMU configuration object
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^^^^^^^^^^^^^^^^^^^^^^^^
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Object can be obtain in several ways. The easiest way is to take pm_cfg_obj.c
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from SDK/Vitis design and build it:::
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$ git clone https://github.com/Xilinx/embeddedsw.git
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$ export EMBEDDED_SW=$PWD/embeddedsw
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$ gcc -c pm_cfg_obj.c -I ${EMBEDDED_SW}/lib/bsp/standalone/src/common/ -I ${EMBEDDED_SW}/lib/sw_services/xilpm/src/zynqmp/client/common/
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$ objcopy -O binary pm_cfg_obj.o pmu_obj.bin
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The second way is to use tools/zynqmp_pm_cfg_obj_convert.py. For more
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information about this tool please run it with -h parameter.
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The third way is to extract it from Xilinx FSBL elf file. Object is starting at
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XPm_ConfigObject symbol.
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Arm Trusted Firmware (ATF)
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^^^^^^^^^^^^^^^^^^^^^^^^^^
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U-Boot itself can run from EL3 to EL1. Without ATF U-Boot runs in EL3. Boot flow
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is U-Boot SPL->U-Boot in EL3. When ATF is used U-Boot normally runs in EL2. Boot
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flow is U-Boot SPL->ATF->U-Boot in EL2. As the part of build process u-boot.itb
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is generated. When BL31 shell variable is present u-boot.itb is generated with
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ATF included. You can point to it by:::
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$ export BL31=<path>/bl31.bin
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Flashing
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--------
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SD Card
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^^^^^^^
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To write an image that boots from a SD card first create a FAT32 partition
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and a FAT32 filesystem on the SD card::
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sudo fdisk /dev/sdx
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sudo mkfs.vfat -F 32 /dev/sdx1
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Mount the SD card and copy the SPL and U-Boot to the root directory of the
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SD card::
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sudo mount -t vfat /dev/sdx1 /mnt
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sudo cp spl/boot.bin /mnt
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sudo cp u-boot.itb /mnt
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Reference in New Issue
Block a user