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Merge https://source.denx.de/u-boot/custodians/u-boot-riscv

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- k210 updates
This commit is contained in:
Tom Rini 2022-03-16 08:11:53 -04:00
commit 469c1bc688
16 changed files with 174 additions and 121 deletions
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12
MAINTAINERS
View File

@ -1115,14 +1115,14 @@ F: drivers/timer/andes_plmt_timer.c
F: drivers/timer/sifive_clint_timer.c F: drivers/timer/sifive_clint_timer.c
F: tools/prelink-riscv.c F: tools/prelink-riscv.c
RISC-V KENDRYTE RISC-V CANAAN KENDRYTE K210
M: Sean Anderson <seanga2@gmail.com> M: Sean Anderson <seanga2@gmail.com>
S: Maintained S: Maintained
F: doc/device-tree-bindings/mfd/kendryte,k210-sysctl.txt F: doc/device-tree-bindings/mfd/canaan,k210-sysctl.txt
F: doc/device-tree-bindings/pinctrl/kendryte,k210-fpioa.txt F: doc/device-tree-bindings/pinctrl/canaan,k210-fpioa.txt
F: drivers/clk/clk_kendryte.c F: drivers/clk/clk_k210.c
F: drivers/pinctrl/pinctrl-kendryte.c F: drivers/pinctrl/pinctrl-k210.c
F: include/kendryte/ F: include/k210/
RNG RNG
M: Sughosh Ganu <sughosh.ganu@linaro.org> M: Sughosh Ganu <sughosh.ganu@linaro.org>

3
arch/riscv/dts/k210-maix-bit.dts
View File

@ -12,7 +12,8 @@
/ { / {
model = "Sipeed Maix Bit 2.0"; model = "Sipeed Maix Bit 2.0";
compatible = "sipeed,maix-bitm", "sipeed,maix-bit", "kendryte,k210"; compatible = "sipeed,maix-bitm", "sipeed,maix-bit",
"canaan,kendryte-k210";
chosen { chosen {
stdout-path = "serial0:115200"; stdout-path = "serial0:115200";

177
arch/riscv/dts/k210.dtsi
View File

@ -15,7 +15,7 @@
*/ */
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
compatible = "kendryte,k210"; compatible = "canaan,kendryte-k210";
aliases { aliases {
cpu0 = &cpu0; cpu0 = &cpu0;
@ -46,7 +46,7 @@
timebase-frequency = <7800000>; timebase-frequency = <7800000>;
cpu0: cpu@0 { cpu0: cpu@0 {
device_type = "cpu"; device_type = "cpu";
compatible = "kendryte,k210", "sifive,rocket0", "riscv"; compatible = "canaan,k210", "sifive,rocket0", "riscv";
reg = <0>; reg = <0>;
riscv,isa = "rv64imafdgc"; riscv,isa = "rv64imafdgc";
mmu-type = "sv39"; mmu-type = "sv39";
@ -63,7 +63,7 @@
}; };
cpu1: cpu@1 { cpu1: cpu@1 {
device_type = "cpu"; device_type = "cpu";
compatible = "kendryte,k210", "sifive,rocket0", "riscv"; compatible = "canaan,k210", "sifive,rocket0", "riscv";
reg = <1>; reg = <1>;
riscv,isa = "rv64imafdgc"; riscv,isa = "rv64imafdgc";
mmu-type = "sv39"; mmu-type = "sv39";
@ -82,7 +82,7 @@
sram: memory@80000000 { sram: memory@80000000 {
device_type = "memory"; device_type = "memory";
compatible = "kendryte,k210-sram"; compatible = "canaan,k210-sram";
reg = <0x80000000 0x400000>, reg = <0x80000000 0x400000>,
<0x80400000 0x200000>, <0x80400000 0x200000>,
<0x80600000 0x200000>; <0x80600000 0x200000>;
@ -106,12 +106,12 @@
soc { soc {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
compatible = "kendryte,k210-soc", "simple-bus"; compatible = "canaan,k210-soc", "simple-bus";
ranges; ranges;
interrupt-parent = <&plic0>; interrupt-parent = <&plic0>;
debug0: debug@0 { debug0: debug@0 {
compatible = "kendryte,k210-debug", "riscv,debug"; compatible = "canaan,k210-debug", "riscv,debug";
reg = <0x0 0x1000>; reg = <0x0 0x1000>;
}; };
@ -122,7 +122,7 @@
clint0: clint@2000000 { clint0: clint@2000000 {
#interrupt-cells = <1>; #interrupt-cells = <1>;
compatible = "kendryte,k210-clint", "riscv,clint0"; compatible = "canaan,k210-clint", "sifive,clint0", "riscv,clint0";
reg = <0x2000000 0xC000>; reg = <0x2000000 0xC000>;
interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>, interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>,
<&cpu1_intc 3>, <&cpu1_intc 7>; <&cpu1_intc 3>, <&cpu1_intc 7>;
@ -131,17 +131,17 @@
plic0: interrupt-controller@C000000 { plic0: interrupt-controller@C000000 {
#interrupt-cells = <1>; #interrupt-cells = <1>;
compatible = "kendryte,k210-plic", "riscv,plic0"; compatible = "canaan,k210-plic", "sifive,plic-1.0.0", "riscv,plic0";
reg = <0xC000000 0x4000000>; reg = <0xC000000 0x4000000>;
interrupt-controller; interrupt-controller;
interrupts-extended = <&cpu0_intc 9>, <&cpu0_intc 11>, interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>,
<&cpu1_intc 9>, <&cpu1_intc 11>; <&cpu1_intc 11>, <&cpu1_intc 9>;
riscv,ndev = <65>; riscv,ndev = <65>;
riscv,max-priority = <7>; riscv,max-priority = <7>;
}; };
uarths0: serial@38000000 { uarths0: serial@38000000 {
compatible = "kendryte,k210-uarths", "sifive,uart0"; compatible = "canaan,k210-uarths", "sifive,uart0";
reg = <0x38000000 0x1000>; reg = <0x38000000 0x1000>;
interrupts = <33>; interrupts = <33>;
clocks = <&sysclk K210_CLK_CPU>; clocks = <&sysclk K210_CLK_CPU>;
@ -151,7 +151,7 @@
gpio0: gpio-controller@38001000 { gpio0: gpio-controller@38001000 {
#interrupt-cells = <2>; #interrupt-cells = <2>;
#gpio-cells = <2>; #gpio-cells = <2>;
compatible = "kendryte,k210-gpiohs", "sifive,gpio0"; compatible = "canaan,k210-gpiohs", "sifive,gpio0";
reg = <0x38001000 0x1000>; reg = <0x38001000 0x1000>;
interrupt-controller; interrupt-controller;
interrupts = <34 35 36 37 38 39 40 41 interrupts = <34 35 36 37 38 39 40 41
@ -164,7 +164,7 @@
}; };
kpu0: kpu@40800000 { kpu0: kpu@40800000 {
compatible = "kendryte,k210-kpu"; compatible = "canaan,k210-kpu";
reg = <0x40800000 0xc00000>; reg = <0x40800000 0xc00000>;
interrupts = <25>; interrupts = <25>;
clocks = <&sysclk K210_CLK_AI>; clocks = <&sysclk K210_CLK_AI>;
@ -172,7 +172,7 @@
}; };
fft0: fft@42000000 { fft0: fft@42000000 {
compatible = "kendryte,k210-fft"; compatible = "canaan,k210-fft";
reg = <0x42000000 0x400000>; reg = <0x42000000 0x400000>;
interrupts = <26>; interrupts = <26>;
clocks = <&sysclk K210_CLK_FFT>; clocks = <&sysclk K210_CLK_FFT>;
@ -181,7 +181,7 @@
}; };
dmac0: dma-controller@50000000 { dmac0: dma-controller@50000000 {
compatible = "kendryte,k210-dmac", "snps,axi-dma-1.01a"; compatible = "canaan,k210-dmac", "snps,axi-dma-1.01a";
reg = <0x50000000 0x1000>; reg = <0x50000000 0x1000>;
interrupts = <27 28 29 30 31 32>; interrupts = <27 28 29 30 31 32>;
clocks = <&sysclk K210_CLK_DMA>, <&sysclk K210_CLK_DMA>; clocks = <&sysclk K210_CLK_DMA>, <&sysclk K210_CLK_DMA>;
@ -199,17 +199,19 @@
apb0: bus@50200000 { apb0: bus@50200000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
compatible = "kendryte,k210-apb", "simple-pm-bus"; compatible = "canaan,k210-apb", "simple-pm-bus";
ranges; ranges;
clocks = <&sysclk K210_CLK_APB0>; clocks = <&sysclk K210_CLK_APB0>;
gpio1: gpio-controller@50200000 { gpio1: gpio-controller@50200000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "kendryte,k210-gpio", compatible = "canaan,k210-gpio",
"snps,dw-apb-gpio"; "snps,dw-apb-gpio";
reg = <0x50200000 0x80>; reg = <0x50200000 0x80>;
clocks = <&sysclk K210_CLK_GPIO>; clocks = <&sysclk K210_CLK_APB0>,
<&sysclk K210_CLK_GPIO>;
clock-names = "bus", "db";
resets = <&sysrst K210_RST_GPIO>; resets = <&sysrst K210_RST_GPIO>;
status = "disabled"; status = "disabled";
@ -226,11 +228,13 @@
}; };
uart1: serial@50210000 { uart1: serial@50210000 {
compatible = "kendryte,k210-uart", compatible = "canaan,k210-uart",
"snps,dw-apb-uart"; "snps,dw-apb-uart";
reg = <0x50210000 0x100>; reg = <0x50210000 0x100>;
interrupts = <11>; interrupts = <11>;
clocks = <&sysclk K210_CLK_UART1>; clocks = <&sysclk K210_CLK_UART1>,
<&sysclk K210_CLK_APB0>;
clock-names = "baudclk", "apb_pclk";
resets = <&sysrst K210_RST_UART1>; resets = <&sysrst K210_RST_UART1>;
reg-io-width = <4>; reg-io-width = <4>;
reg-shift = <2>; reg-shift = <2>;
@ -242,11 +246,13 @@
}; };
uart2: serial@50220000 { uart2: serial@50220000 {
compatible = "kendryte,k210-uart", compatible = "canaan,k210-uart",
"snps,dw-apb-uart"; "snps,dw-apb-uart";
reg = <0x50220000 0x100>; reg = <0x50220000 0x100>;
interrupts = <12>; interrupts = <12>;
clocks = <&sysclk K210_CLK_UART2>; clocks = <&sysclk K210_CLK_UART2>,
<&sysclk K210_CLK_APB0>;
clock-names = "baudclk", "apb_pclk";
resets = <&sysrst K210_RST_UART2>; resets = <&sysrst K210_RST_UART2>;
reg-io-width = <4>; reg-io-width = <4>;
reg-shift = <2>; reg-shift = <2>;
@ -258,11 +264,13 @@
}; };
uart3: serial@50230000 { uart3: serial@50230000 {
compatible = "kendryte,k210-uart", compatible = "canaan,k210-uart",
"snps,dw-apb-uart"; "snps,dw-apb-uart";
reg = <0x50230000 0x100>; reg = <0x50230000 0x100>;
interrupts = <13>; interrupts = <13>;
clocks = <&sysclk K210_CLK_UART3>; clocks = <&sysclk K210_CLK_UART3>,
<&sysclk K210_CLK_APB0>;
clock-names = "baudclk", "apb_pclk";
resets = <&sysrst K210_RST_UART3>; resets = <&sysrst K210_RST_UART3>;
reg-io-width = <4>; reg-io-width = <4>;
reg-shift = <2>; reg-shift = <2>;
@ -274,20 +282,22 @@
}; };
spi2: spi@50240000 { spi2: spi@50240000 {
compatible = "canaan,kendryte-k210-spi", compatible = "canaan,k210-spi",
"snps,dw-apb-ssi-4.01", "snps,dw-apb-ssi-4.01",
"snps,dw-apb-ssi"; "snps,dw-apb-ssi";
spi-slave; spi-slave;
reg = <0x50240000 0x100>; reg = <0x50240000 0x100>;
interrupts = <2>; interrupts = <2>;
clocks = <&sysclk K210_CLK_SPI2>; clocks = <&sysclk K210_CLK_SPI2>,
<&sysclk K210_CLK_APB0>;
clock-names = "ssi_clk", "pclk";
resets = <&sysrst K210_RST_SPI2>; resets = <&sysrst K210_RST_SPI2>;
spi-max-frequency = <25000000>; spi-max-frequency = <25000000>;
status = "disabled"; status = "disabled";
}; };
i2s0: i2s@50250000 { i2s0: i2s@50250000 {
compatible = "kendryte,k210-i2s", compatible = "canaan,k210-i2s",
"snps,designware-i2s"; "snps,designware-i2s";
reg = <0x50250000 0x200>; reg = <0x50250000 0x200>;
interrupts = <5>; interrupts = <5>;
@ -298,13 +308,13 @@
}; };
apu0: sound@520250200 { apu0: sound@520250200 {
compatible = "kendryte,k210-apu"; compatible = "canaan,k210-apu";
reg = <0x50250200 0x200>; reg = <0x50250200 0x200>;
status = "disabled"; status = "disabled";
}; };
i2s1: i2s@50260000 { i2s1: i2s@50260000 {
compatible = "kendryte,k210-i2s", compatible = "canaan,k210-i2s",
"snps,designware-i2s"; "snps,designware-i2s";
reg = <0x50260000 0x200>; reg = <0x50260000 0x200>;
interrupts = <6>; interrupts = <6>;
@ -315,7 +325,7 @@
}; };
i2s2: i2s@50270000 { i2s2: i2s@50270000 {
compatible = "kendryte,k210-i2s", compatible = "canaan,k210-i2s",
"snps,designware-i2s"; "snps,designware-i2s";
reg = <0x50270000 0x200>; reg = <0x50270000 0x200>;
interrupts = <7>; interrupts = <7>;
@ -326,42 +336,49 @@
}; };
i2c0: i2c@50280000 { i2c0: i2c@50280000 {
compatible = "kendryte,k210-i2c", compatible = "canaan,k210-i2c",
"snps,designware-i2c"; "snps,designware-i2c";
reg = <0x50280000 0x100>; reg = <0x50280000 0x100>;
interrupts = <8>; interrupts = <8>;
clocks = <&sysclk K210_CLK_I2C0>; clocks = <&sysclk K210_CLK_I2C0>,
<&sysclk K210_CLK_APB0>;
clock-names = "ref", "pclk";
resets = <&sysrst K210_RST_I2C0>; resets = <&sysrst K210_RST_I2C0>;
status = "disabled"; status = "disabled";
}; };
i2c1: i2c@50290000 { i2c1: i2c@50290000 {
compatible = "kendryte,k210-i2c", compatible = "canaan,k210-i2c",
"snps,designware-i2c"; "snps,designware-i2c";
reg = <0x50290000 0x100>; reg = <0x50290000 0x100>;
interrupts = <9>; interrupts = <9>;
clocks = <&sysclk K210_CLK_I2C1>; clocks = <&sysclk K210_CLK_I2C1>,
<&sysclk K210_CLK_APB0>;
clock-names = "ref", "pclk";
resets = <&sysrst K210_RST_I2C1>; resets = <&sysrst K210_RST_I2C1>;
status = "disabled"; status = "disabled";
}; };
i2c2: i2c@502A0000 { i2c2: i2c@502A0000 {
compatible = "kendryte,k210-i2c", compatible = "canaan,k210-i2c",
"snps,designware-i2c"; "snps,designware-i2c";
reg = <0x502A0000 0x100>; reg = <0x502A0000 0x100>;
interrupts = <10>; interrupts = <10>;
clocks = <&sysclk K210_CLK_I2C2>; clocks = <&sysclk K210_CLK_I2C2>,
<&sysclk K210_CLK_APB0>;
clock-names = "ref", "pclk";
resets = <&sysrst K210_RST_I2C2>; resets = <&sysrst K210_RST_I2C2>;
status = "disabled"; status = "disabled";
}; };
fpioa: pinmux@502B0000 { fpioa: pinmux@502B0000 {
compatible = "kendryte,k210-fpioa"; compatible = "canaan,k210-fpioa";
reg = <0x502B0000 0x100>; reg = <0x502B0000 0x100>;
clocks = <&sysclk K210_CLK_FPIOA>; clocks = <&sysclk K210_CLK_FPIOA>,
<&sysclk K210_CLK_APB0>;
clock-names = "ref", "pclk";
resets = <&sysrst K210_RST_FPIOA>; resets = <&sysrst K210_RST_FPIOA>;
kendryte,sysctl = <&sysctl>; canaan,k210-sysctl-power = <&sysctl K210_SYSCTL_POWER_SEL>;
kendryte,power-offset = <K210_SYSCTL_POWER_SEL>;
pinctrl-0 = <&fpioa_jtag>; pinctrl-0 = <&fpioa_jtag>;
pinctrl-names = "default"; pinctrl-names = "default";
status = "disabled"; status = "disabled";
@ -375,7 +392,7 @@
}; };
sha256: sha256@502C0000 { sha256: sha256@502C0000 {
compatible = "kendryte,k210-sha256"; compatible = "canaan,k210-sha256";
reg = <0x502C0000 0x100>; reg = <0x502C0000 0x100>;
clocks = <&sysclk K210_CLK_SHA>; clocks = <&sysclk K210_CLK_SHA>;
resets = <&sysrst K210_RST_SHA>; resets = <&sysrst K210_RST_SHA>;
@ -383,34 +400,37 @@
}; };
timer0: timer@502D0000 { timer0: timer@502D0000 {
compatible = "kendryte,k210-timer", compatible = "canaan,k210-timer",
"snps,dw-apb-timer"; "snps,dw-apb-timer";
reg = <0x502D0000 0x100>; reg = <0x502D0000 0x100>;
interrupts = <14 15>; interrupts = <14 15>;
clocks = <&sysclk K210_CLK_TIMER0>; clocks = <&sysclk K210_CLK_TIMER0>,
clock-names = "timer"; <&sysclk K210_CLK_APB0>;
clock-names = "timer", "pclk";
resets = <&sysrst K210_RST_TIMER0>; resets = <&sysrst K210_RST_TIMER0>;
status = "disabled"; status = "disabled";
}; };
timer1: timer@502E0000 { timer1: timer@502E0000 {
compatible = "kendryte,k210-timer", compatible = "canaan,k210-timer",
"snps,dw-apb-timer"; "snps,dw-apb-timer";
reg = <0x502E0000 0x100>; reg = <0x502E0000 0x100>;
interrupts = <16 17>; interrupts = <16 17>;
clocks = <&sysclk K210_CLK_TIMER1>; clocks = <&sysclk K210_CLK_TIMER1>,
clock-names = "timer"; <&sysclk K210_CLK_APB0>;
clock-names = "timer", "pclk";
resets = <&sysrst K210_RST_TIMER1>; resets = <&sysrst K210_RST_TIMER1>;
status = "disabled"; status = "disabled";
}; };
timer2: timer@502F0000 { timer2: timer@502F0000 {
compatible = "kendryte,k210-timer", compatible = "canaan,k210-timer",
"snps,dw-apb-timer"; "snps,dw-apb-timer";
reg = <0x502F0000 0x100>; reg = <0x502F0000 0x100>;
interrupts = <18 19>; interrupts = <18 19>;
clocks = <&sysclk K210_CLK_TIMER2>; clocks = <&sysclk K210_CLK_TIMER2>,
clock-names = "timer"; <&sysclk K210_CLK_APB0>;
clock-names = "timer", "pclk";
resets = <&sysrst K210_RST_TIMER2>; resets = <&sysrst K210_RST_TIMER2>;
status = "disabled"; status = "disabled";
}; };
@ -419,23 +439,27 @@
apb1: bus@50400000 { apb1: bus@50400000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
compatible = "kendryte,k210-apb", "simple-pm-bus"; compatible = "canaan,k210-apb", "simple-pm-bus";
ranges; ranges;
clocks = <&sysclk K210_CLK_APB1>; clocks = <&sysclk K210_CLK_APB1>;
wdt0: watchdog@50400000 { wdt0: watchdog@50400000 {
compatible = "kendryte,k210-wdt", "snps,dw-wdt"; compatible = "canaan,k210-wdt", "snps,dw-wdt";
reg = <0x50400000 0x100>; reg = <0x50400000 0x100>;
interrupts = <21>; interrupts = <21>;
clocks = <&sysclk K210_CLK_WDT0>; clocks = <&sysclk K210_CLK_WDT0>,
<&sysclk K210_CLK_APB1>;
clock-names = "tclk", "pclk";
resets = <&sysrst K210_RST_WDT0>; resets = <&sysrst K210_RST_WDT0>;
}; };
wdt1: watchdog@50410000 { wdt1: watchdog@50410000 {
compatible = "kendryte,k210-wdt", "snps,dw-wdt"; compatible = "canaan,k210-wdt", "snps,dw-wdt";
reg = <0x50410000 0x100>; reg = <0x50410000 0x100>;
interrupts = <22>; interrupts = <22>;
clocks = <&sysclk K210_CLK_WDT1>; clocks = <&sysclk K210_CLK_WDT1>,
<&sysclk K210_CLK_APB1>;
clock-names = "tclk", "pclk";
resets = <&sysrst K210_RST_WDT1>; resets = <&sysrst K210_RST_WDT1>;
status = "disabled"; status = "disabled";
}; };
@ -443,7 +467,7 @@
otp0: nvmem@50420000 { otp0: nvmem@50420000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
compatible = "kendryte,k210-otp"; compatible = "canaan,k210-otp";
reg = <0x50420000 0x100>, reg = <0x50420000 0x100>,
<0x88000000 0x20000>; <0x88000000 0x20000>;
reg-names = "reg", "mem"; reg-names = "reg", "mem";
@ -480,26 +504,28 @@
}; };
dvp0: camera@50430000 { dvp0: camera@50430000 {
compatible = "kendryte,k210-dvp"; compatible = "canaan,k210-dvp";
reg = <0x50430000 0x100>; reg = <0x50430000 0x100>;
interrupts = <24>; interrupts = <24>;
clocks = <&sysclk K210_CLK_DVP>; clocks = <&sysclk K210_CLK_DVP>;
resets = <&sysrst K210_RST_DVP>; resets = <&sysrst K210_RST_DVP>;
kendryte,sysctl = <&sysctl>; canaan,k210-sysctl = <&sysctl>;
kendryte,misc-offset = <K210_SYSCTL_MISC>; canaan,k210-misc-offset = <K210_SYSCTL_MISC>;
status = "disabled"; status = "disabled";
}; };
sysctl: syscon@50440000 { sysctl: syscon@50440000 {
compatible = "kendryte,k210-sysctl", compatible = "canaan,k210-sysctl",
"syscon", "simple-mfd"; "syscon", "simple-mfd";
reg = <0x50440000 0x100>; reg = <0x50440000 0x100>;
clocks = <&sysclk K210_CLK_APB1>;
clock-names = "pclk";
reg-io-width = <4>; reg-io-width = <4>;
u-boot,dm-pre-reloc; u-boot,dm-pre-reloc;
sysclk: clock-controller { sysclk: clock-controller {
#clock-cells = <1>; #clock-cells = <1>;
compatible = "kendryte,k210-clk"; compatible = "canaan,k210-clk";
clocks = <&in0>; clocks = <&in0>;
assigned-clocks = <&sysclk K210_CLK_PLL1>; assigned-clocks = <&sysclk K210_CLK_PLL1>;
assigned-clock-rates = <390000000>; assigned-clock-rates = <390000000>;
@ -507,7 +533,7 @@
}; };
sysrst: reset-controller { sysrst: reset-controller {
compatible = "kendryte,k210-rst", compatible = "canaan,k210-rst",
"syscon-reset"; "syscon-reset";
#reset-cells = <1>; #reset-cells = <1>;
regmap = <&sysctl>; regmap = <&sysctl>;
@ -526,7 +552,7 @@
}; };
aes0: aes@50450000 { aes0: aes@50450000 {
compatible = "kendryte,k210-aes"; compatible = "canaan,k210-aes";
reg = <0x50450000 0x100>; reg = <0x50450000 0x100>;
clocks = <&sysclk K210_CLK_AES>; clocks = <&sysclk K210_CLK_AES>;
resets = <&sysrst K210_RST_AES>; resets = <&sysrst K210_RST_AES>;
@ -534,7 +560,7 @@
}; };
rtc: rtc@50460000 { rtc: rtc@50460000 {
compatible = "kendryte,k210-rtc"; compatible = "canaan,k210-rtc";
reg = <0x50460000 0x100>; reg = <0x50460000 0x100>;
clocks = <&in0>; clocks = <&in0>;
resets = <&sysrst K210_RST_RTC>; resets = <&sysrst K210_RST_RTC>;
@ -546,20 +572,21 @@
apb2: bus@52000000 { apb2: bus@52000000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
compatible = "kendryte,k210-apb", "simple-pm-bus"; compatible = "canaan,k210-apb", "simple-pm-bus";
ranges; ranges;
clocks = <&sysclk K210_CLK_APB2>; clocks = <&sysclk K210_CLK_APB2>;
spi0: spi@52000000 { spi0: spi@52000000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "canaan,kendryte-k210-spi", compatible = "canaan,k210-spi",
"snps,dw-apb-ssi-4.01", "snps,dw-apb-ssi-4.01",
"snps,dw-apb-ssi"; "snps,dw-apb-ssi";
reg = <0x52000000 0x100>; reg = <0x52000000 0x100>;
interrupts = <1>; interrupts = <1>;
clocks = <&sysclk K210_CLK_SPI0>; clocks = <&sysclk K210_CLK_SPI0>,
clock-names = "ssi_clk"; <&sysclk K210_CLK_APB2>;
clock-names = "ssi_clk", "pclk";
resets = <&sysrst K210_RST_SPI0>; resets = <&sysrst K210_RST_SPI0>;
spi-max-frequency = <25000000>; spi-max-frequency = <25000000>;
num-cs = <4>; num-cs = <4>;
@ -570,13 +597,14 @@
spi1: spi@53000000 { spi1: spi@53000000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "canaan,kendryte-k210-spi", compatible = "canaan,k210-spi",
"snps,dw-apb-ssi-4.01", "snps,dw-apb-ssi-4.01",
"snps,dw-apb-ssi"; "snps,dw-apb-ssi";
reg = <0x53000000 0x100>; reg = <0x53000000 0x100>;
interrupts = <2>; interrupts = <2>;
clocks = <&sysclk K210_CLK_SPI1>; clocks = <&sysclk K210_CLK_SPI1>,
clock-names = "ssi_clk"; <&sysclk K210_CLK_APB2>;
clock-names = "ssi_clk", "pclk";
resets = <&sysrst K210_RST_SPI1>; resets = <&sysrst K210_RST_SPI1>;
spi-max-frequency = <25000000>; spi-max-frequency = <25000000>;
num-cs = <4>; num-cs = <4>;
@ -587,12 +615,13 @@
spi3: spi@54000000 { spi3: spi@54000000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "canaan,kendryte-k210-ssi", compatible = "canaan,k210-ssi",
"snps,dwc-ssi-1.01a"; "snps,dwc-ssi-1.01a";
reg = <0x54000000 0x200>; reg = <0x54000000 0x200>;
interrupts = <4>; interrupts = <4>;
clocks = <&sysclk K210_CLK_SPI3>; clocks = <&sysclk K210_CLK_SPI3>,
clock-names = "ssi_clk"; <&sysclk K210_CLK_APB2>;
clock-names = "ssi_clk", "pclk";
resets = <&sysrst K210_RST_SPI3>; resets = <&sysrst K210_RST_SPI3>;
/* Could possibly go up to 200 MHz */ /* Could possibly go up to 200 MHz */
spi-max-frequency = <100000000>; spi-max-frequency = <100000000>;

2
board/sipeed/maix/maix.c
View File

@ -22,7 +22,7 @@ static int sram_init(void)
struct clk clk; struct clk clk;
/* Enable RAM clocks */ /* Enable RAM clocks */
memory = ofnode_by_compatible(ofnode_null(), "kendryte,k210-sram"); memory = ofnode_by_compatible(ofnode_null(), "canaan,k210-sram");
if (ofnode_equal(memory, ofnode_null())) if (ofnode_equal(memory, ofnode_null()))
return -ENOENT; return -ENOENT;

20
doc/board/sipeed/maix.rst
View File

@ -4,16 +4,16 @@
MAIX MAIX
==== ====
Several of the Sipeed Maix series of boards cotain the Kendryte K210 processor, Several of the Sipeed Maix series of boards contain the Kendryte K210 processor,
a 64-bit RISC-V CPU. This processor contains several peripherals to accelerate a 64-bit RISC-V CPU produced by Canaan Inc. This processor contains several
neural network processing and other "ai" tasks. This includes a "KPU" neural peripherals to accelerate neural network processing and other "ai" tasks. This
network processor, an audio processor supporting beamforming reception, and a includes a "KPU" neural network processor, an audio processor supporting
digital video port supporting capture and output at VGA resolution. Other beamforming reception, and a digital video port supporting capture and output at
peripherals include 8M of SRAM (accessible with and without caching); remappable VGA resolution. Other peripherals include 8M of SRAM (accessible with and
pins, including 40 GPIOs; AES, FFT, and SHA256 accelerators; a DMA controller; without caching); remappable pins, including 40 GPIOs; AES, FFT, and SHA256
and I2C, I2S, and SPI controllers. Maix peripherals vary, but include spi flash; accelerators; a DMA controller; and I2C, I2S, and SPI controllers. Maix
on-board usb-serial bridges; ports for cameras, displays, and sd cards; and peripherals vary, but include spi flash; on-board usb-serial bridges; ports for
ESP32 chips. cameras, displays, and sd cards; and ESP32 chips.
Currently, only the Sipeed MAIX BiT V2.0 (bitm) and Sipeed MAIXDUINO are Currently, only the Sipeed MAIX BiT V2.0 (bitm) and Sipeed MAIXDUINO are
supported, but the boards are fairly similar. supported, but the boards are fairly similar.

8
doc/device-tree-bindings/mfd/kendryte,k210-sysctl.txt → doc/device-tree-bindings/mfd/canaan,k210-sysctl.txt
View File

@ -6,7 +6,7 @@ be reference by other bindings which need a phandle to the K210 sysctl regmap.
Required properties: Required properties:
- compatible: should be - compatible: should be
"kendryte,k210-sysctl", "syscon", "simple-mfd" "canaan,k210-sysctl", "syscon", "simple-mfd"
- reg: address and length of the sysctl registers - reg: address and length of the sysctl registers
- reg-io-width: must be <4> - reg-io-width: must be <4>
@ -15,18 +15,18 @@ Clock sub-node
This node is a binding for the clock tree driver This node is a binding for the clock tree driver
Required properties: Required properties:
- compatible: should be "kendryte,k210-clk" - compatible: should be "canaan,k210-clk"
- clocks: phandle to the "in0" external oscillator - clocks: phandle to the "in0" external oscillator
- #clock-cells: must be <1> - #clock-cells: must be <1>
Example: Example:
sysctl: syscon@50440000 { sysctl: syscon@50440000 {
compatible = "kendryte,k210-sysctl", "syscon", "simple-mfd"; compatible = "canaan,k210-sysctl", "syscon", "simple-mfd";
reg = <0x50440000 0x100>; reg = <0x50440000 0x100>;
reg-io-width = <4>; reg-io-width = <4>;
sysclk: clock-controller { sysclk: clock-controller {
compatible = "kendryte,k210-clk"; compatible = "canaan,k210-clk";
clocks = <&in0>; clocks = <&in0>;
#clock-cells = <1>; #clock-cells = <1>;
}; };

12
doc/device-tree-bindings/pinctrl/kendryte,k210-fpioa.txt → doc/device-tree-bindings/pinctrl/canaan,k210-fpioa.txt
View File

@ -5,10 +5,10 @@ in Kendryte K210 SoCs. Any of the 256 functions can be mapped to any of the 48
pins. pins.
Required properties: Required properties:
- compatible: should be "kendryte,k210-fpioa" - compatible: should be "canaan,k210-fpioa"
- reg: address and length of the FPIOA registers - reg: address and length of the FPIOA registers
- kendryte,sysctl: phandle to the "sysctl" register map node - canaan,sysctl: phandle to the "sysctl" register map node
- kendryte,power-offset: offset in the register map of the power bank control - canaan,k210-power-offset: offset in the register map of the power bank control
register (in bytes) register (in bytes)
Configuration nodes Configuration nodes
@ -54,10 +54,10 @@ Notes on specific properties include:
Example: Example:
fpioa: pinmux@502B0000 { fpioa: pinmux@502B0000 {
compatible = "kendryte,k210-fpioa"; compatible = "canaan,k210-fpioa";
reg = <0x502B0000 0x100>; reg = <0x502B0000 0x100>;
kendryte,sysctl = <&sysctl>; canaan,k210-sysctl = <&sysctl>;
kendryte,power-offset = <K210_SYSCTL_POWER_SEL>; canaan,k210-power-offset = <K210_SYSCTL_POWER_SEL>;
/* JTAG running at 3.3V and driven at 11 mA */ /* JTAG running at 3.3V and driven at 11 mA */
fpioa_jtag: jtag { fpioa_jtag: jtag {

4
doc/device-tree-bindings/spi/snps,dw-apb-ssi.txt
View File

@ -5,8 +5,8 @@ Required properties:
- compatible : One of - compatible : One of
"altr,socfpga-spi", "altr,socfpga-spi",
"altr,socfpga-arria10-spi", "altr,socfpga-arria10-spi",
"canaan,kendryte-k210-spi", "canaan,k210-spi",
"canaan,kendryte-k210-ssi", "canaan,k210-ssi",
"intel,stratix10-spi", "intel,stratix10-spi",
"intel,agilex-spi", "intel,agilex-spi",
"mscc,ocelot-spi", "mscc,ocelot-spi",

2
drivers/clk/Makefile
View File

@ -29,7 +29,7 @@ obj-$(CONFIG_CLK_BOSTON) += clk_boston.o
obj-$(CONFIG_CLK_CDCE9XX) += clk-cdce9xx.o obj-$(CONFIG_CLK_CDCE9XX) += clk-cdce9xx.o
obj-$(CONFIG_CLK_EXYNOS) += exynos/ obj-$(CONFIG_CLK_EXYNOS) += exynos/
obj-$(CONFIG_CLK_HSDK) += clk-hsdk-cgu.o obj-$(CONFIG_CLK_HSDK) += clk-hsdk-cgu.o
obj-$(CONFIG_CLK_K210) += clk_kendryte.o obj-$(CONFIG_CLK_K210) += clk_k210.o
obj-$(CONFIG_CLK_MPC83XX) += mpc83xx_clk.o obj-$(CONFIG_CLK_MPC83XX) += mpc83xx_clk.o
obj-$(CONFIG_CLK_MPFS) += microchip/ obj-$(CONFIG_CLK_MPFS) += microchip/
obj-$(CONFIG_CLK_MVEBU) += mvebu/ obj-$(CONFIG_CLK_MVEBU) += mvebu/

4
drivers/clk/clk_kendryte.c → drivers/clk/clk_k210.c
View File

@ -14,7 +14,7 @@
#include <serial.h> #include <serial.h>
#include <dt-bindings/clock/k210-sysctl.h> #include <dt-bindings/clock/k210-sysctl.h>
#include <dt-bindings/mfd/k210-sysctl.h> #include <dt-bindings/mfd/k210-sysctl.h>
#include <kendryte/pll.h> #include <k210/pll.h>
#include <linux/bitfield.h> #include <linux/bitfield.h>
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
@ -1271,7 +1271,7 @@ static int k210_clk_probe(struct udevice *dev)
} }
static const struct udevice_id k210_clk_ids[] = { static const struct udevice_id k210_clk_ids[] = {
{ .compatible = "kendryte,k210-clk" }, { .compatible = "canaan,k210-clk" },
{ }, { },
}; };

2
drivers/pinctrl/Makefile
View File

@ -18,7 +18,7 @@ obj-$(CONFIG_PINCTRL_SANDBOX) += pinctrl-sandbox.o
obj-$(CONFIG_PINCTRL_UNIPHIER) += uniphier/ obj-$(CONFIG_PINCTRL_UNIPHIER) += uniphier/
obj-$(CONFIG_PINCTRL_PIC32) += pinctrl_pic32.o obj-$(CONFIG_PINCTRL_PIC32) += pinctrl_pic32.o
obj-$(CONFIG_PINCTRL_EXYNOS) += exynos/ obj-$(CONFIG_PINCTRL_EXYNOS) += exynos/
obj-$(CONFIG_PINCTRL_K210) += pinctrl-kendryte.o obj-$(CONFIG_PINCTRL_K210) += pinctrl-k210.o
obj-$(CONFIG_PINCTRL_MESON) += meson/ obj-$(CONFIG_PINCTRL_MESON) += meson/
obj-$(CONFIG_PINCTRL_MTK) += mediatek/ obj-$(CONFIG_PINCTRL_MTK) += mediatek/
obj-$(CONFIG_PINCTRL_MSCC) += mscc/ obj-$(CONFIG_PINCTRL_MSCC) += mscc/

25
drivers/pinctrl/pinctrl-kendryte.c → drivers/pinctrl/pinctrl-k210.c
View File

@ -511,7 +511,7 @@ static int k210_pc_get_drive(unsigned max_strength_ua)
{ {
int i; int i;
for (i = K210_PC_DRIVE_MAX; i; i--) for (i = K210_PC_DRIVE_MAX; i >= 0; i--)
if (k210_pc_drive_strength[i] < max_strength_ua) if (k210_pc_drive_strength[i] < max_strength_ua)
return i; return i;
@ -536,7 +536,7 @@ static int k210_pc_pinconf_set(struct udevice *dev, unsigned pin_selector,
break; break;
case PIN_CONFIG_BIAS_PULL_UP: case PIN_CONFIG_BIAS_PULL_UP:
if (argument) if (argument)
val |= K210_PC_PD; val |= K210_PC_PU;
else else
return -EINVAL; return -EINVAL;
break; break;
@ -679,6 +679,7 @@ static int k210_pc_probe(struct udevice *dev)
{ {
int ret, i, j; int ret, i, j;
struct k210_pc_priv *priv = dev_get_priv(dev); struct k210_pc_priv *priv = dev_get_priv(dev);
struct ofnode_phandle_args args;
priv->fpioa = dev_read_addr_ptr(dev); priv->fpioa = dev_read_addr_ptr(dev);
if (!priv->fpioa) if (!priv->fpioa)
@ -692,15 +693,23 @@ static int k210_pc_probe(struct udevice *dev)
if (ret && ret != -ENOSYS && ret != -ENOTSUPP) if (ret && ret != -ENOSYS && ret != -ENOTSUPP)
goto err; goto err;
priv->sysctl = syscon_regmap_lookup_by_phandle(dev, "kendryte,sysctl"); ret = dev_read_phandle_with_args(dev, "canaan,k210-sysctl-power",
NULL, 1, 0, &args);
if (ret)
goto err;
if (args.args_count != 1) {
ret = -EINVAL;
goto err;
}
priv->sysctl = syscon_node_to_regmap(args.node);
if (IS_ERR(priv->sysctl)) { if (IS_ERR(priv->sysctl)) {
ret = -ENODEV; ret = PTR_ERR(priv->sysctl);
goto err; goto err;
} }
ret = dev_read_u32(dev, "kendryte,power-offset", &priv->power_offset); priv->power_offset = args.args[0];
if (ret)
goto err;
debug("%s: fpioa = %p sysctl = %p power offset = %x\n", __func__, debug("%s: fpioa = %p sysctl = %p power offset = %x\n", __func__,
priv->fpioa, (void *)priv->sysctl->ranges[0].start, priv->fpioa, (void *)priv->sysctl->ranges[0].start,
@ -726,7 +735,7 @@ err:
} }
static const struct udevice_id k210_pc_ids[] = { static const struct udevice_id k210_pc_ids[] = {
{ .compatible = "kendryte,k210-fpioa" }, { .compatible = "canaan,k210-fpioa" },
{ } { }
}; };

20
drivers/spi/designware_spi.c
View File

@ -194,6 +194,20 @@ static int dw_spi_apb_init(struct udevice *bus, struct dw_spi_priv *priv)
return 0; return 0;
} }
static int dw_spi_apb_k210_init(struct udevice *bus, struct dw_spi_priv *priv)
{
/*
* The Canaan Kendryte K210 SoC DW apb_ssi v4 spi controller is
* documented to have a 32 word deep TX and RX FIFO, which
* spi_hw_init() detects. However, when the RX FIFO is filled up to
* 32 entries (RXFLR = 32), an RX FIFO overrun error occurs. Avoid
* this problem by force setting fifo_len to 31.
*/
priv->fifo_len = 31;
return dw_spi_apb_init(bus, priv);
}
static int dw_spi_dwc_init(struct udevice *bus, struct dw_spi_priv *priv) static int dw_spi_dwc_init(struct udevice *bus, struct dw_spi_priv *priv)
{ {
priv->max_xfer = 32; priv->max_xfer = 32;
@ -252,7 +266,7 @@ static int dw_spi_of_to_plat(struct udevice *bus)
static void spi_hw_init(struct udevice *bus, struct dw_spi_priv *priv) static void spi_hw_init(struct udevice *bus, struct dw_spi_priv *priv)
{ {
dw_write(priv, DW_SPI_SSIENR, 0); dw_write(priv, DW_SPI_SSIENR, 0);
dw_write(priv, DW_SPI_IMR, 0xff); dw_write(priv, DW_SPI_IMR, 0);
dw_write(priv, DW_SPI_SSIENR, 1); dw_write(priv, DW_SPI_SSIENR, 1);
/* /*
@ -758,8 +772,8 @@ static const struct udevice_id dw_spi_ids[] = {
*/ */
{ .compatible = "altr,socfpga-spi", .data = (ulong)dw_spi_apb_init }, { .compatible = "altr,socfpga-spi", .data = (ulong)dw_spi_apb_init },
{ .compatible = "altr,socfpga-arria10-spi", .data = (ulong)dw_spi_apb_init }, { .compatible = "altr,socfpga-arria10-spi", .data = (ulong)dw_spi_apb_init },
{ .compatible = "canaan,kendryte-k210-spi", .data = (ulong)dw_spi_apb_init }, { .compatible = "canaan,k210-spi", .data = (ulong)dw_spi_apb_k210_init},
{ .compatible = "canaan,kendryte-k210-ssi", .data = (ulong)dw_spi_dwc_init }, { .compatible = "canaan,k210-ssi", .data = (ulong)dw_spi_dwc_init },
{ .compatible = "intel,stratix10-spi", .data = (ulong)dw_spi_apb_init }, { .compatible = "intel,stratix10-spi", .data = (ulong)dw_spi_apb_init },
{ .compatible = "intel,agilex-spi", .data = (ulong)dw_spi_apb_init }, { .compatible = "intel,agilex-spi", .data = (ulong)dw_spi_apb_init },
{ .compatible = "mscc,ocelot-spi", .data = (ulong)dw_spi_apb_init }, { .compatible = "mscc,ocelot-spi", .data = (ulong)dw_spi_apb_init },

2
include/configs/sipeed-maix.h
View File

@ -20,7 +20,7 @@
"fdt_addr_r=0x80400000\0" \ "fdt_addr_r=0x80400000\0" \
"scriptaddr=0x80020000\0" \ "scriptaddr=0x80020000\0" \
"kernel_addr_r=0x80060000\0" \ "kernel_addr_r=0x80060000\0" \
"fdtfile=kendryte/" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ "fdtfile=k210/" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
"k210_bootcmd=load mmc 0:1 $loadaddr /uImage && " \ "k210_bootcmd=load mmc 0:1 $loadaddr /uImage && " \
"load mmc 0:1 $fdt_addr_r /k210.dtb && " \ "load mmc 0:1 $fdt_addr_r /k210.dtb && " \
"bootm $loadaddr - $fdt_addr_r\0" "bootm $loadaddr - $fdt_addr_r\0"

0
include/kendryte/pll.h → include/k210/pll.h
View File

2
test/dm/k210_pll.c
View File

@ -7,7 +7,7 @@
/* For DIV_ROUND_DOWN_ULL, defined in linux/kernel.h */ /* For DIV_ROUND_DOWN_ULL, defined in linux/kernel.h */
#include <div64.h> #include <div64.h>
#include <dm/test.h> #include <dm/test.h>
#include <kendryte/pll.h> #include <k210/pll.h>
#include <test/ut.h> #include <test/ut.h>
static int dm_test_k210_pll_calc_config(u32 rate, u32 rate_in, static int dm_test_k210_pll_calc_config(u32 rate, u32 rate_in,