arm: imx6: tqma6: add support for TQMa6DL variant
This adds support for TQMa6DL using i.MX6DL and 1GiB DRAM Since The module will use the same devicetree, we patch the ram size in ft_board_setup. Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
This commit is contained in:
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d4b349e41b
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@ -22,6 +22,12 @@ config TQMA6Q
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help
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select TQMa6Q / TQMa6D with i.MX6Q/D and 1GiB DRAM
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config TQMA6DL
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bool "TQMa6DL"
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select MX6DL
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help
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select TQMa6DL with i.MX6DL and 1GiB DRAM
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config TQMA6S
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bool "TQMa6S"
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select MX6S
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@ -70,6 +76,7 @@ endchoice
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config IMX_CONFIG
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default "board/tqc/tqma6/tqma6q.cfg" if TQMA6Q
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default "board/tqc/tqma6/tqma6dl.cfg" if TQMA6DL
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default "board/tqc/tqma6/tqma6s.cfg" if TQMA6S
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endif
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@ -21,6 +21,7 @@ To build U-Boot for the TQ Systems TQMa6 modules:
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x is a placeholder for the CPU variant
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q - means i.MX6Q/D: TQMa6Q (i.MX6Q) and TQMa6D (i.MX6D)
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dl - means i.MX6DL: TQMa6DL (i.MX6DL)
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s - means i.MX6S: TQMa6S (i.MX6S)
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baseboard is a placeholder for the boot device
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@ -31,5 +32,7 @@ This gives the following configurations:
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tqma6q_mba6_mmc_config
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tqma6q_mba6_spi_config
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tqma6dl_mba6_mmc_config
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tqma6dl_mba6_spi_config
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tqma6s_mba6_mmc_config
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tqma6s_mba6_spi_config
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@ -269,8 +269,15 @@ int checkboard(void)
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* Device Tree Support
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*/
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#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT)
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#define MODELSTRLEN 32u
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int ft_board_setup(void *blob, bd_t *bd)
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{
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char modelstr[MODELSTRLEN];
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snprintf(modelstr, MODELSTRLEN, "TQ %s on %s", tqma6_get_boardname(),
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tqma6_bb_get_boardname());
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do_fixup_by_path_string(blob, "/", "model", modelstr);
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fdt_fixup_memory(blob, (u64)PHYS_SDRAM, (u64)gd->ram_size);
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/* bring in eMMC dsr settings */
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do_fixup_by_path_u32(blob,
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"/soc/aips-bus@02100000/usdhc@02198000",
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@ -59,7 +59,7 @@ DECLARE_GLOBAL_DATA_PTR;
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#define IOMUX_SW_PAD_CTRL_GRP_DDR_TYPE_RGMII 0x02e0790
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#define IOMUX_SW_PAD_CTRL_GRP_RGMII_TERM 0x02e07ac
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#elif defined(CONFIG_TQMA6S)
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#elif defined(CONFIG_TQMA6S) || defined(CONFIG_TQMA6DL)
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#define IOMUX_SW_PAD_CTRL_GRP_DDR_TYPE_RGMII 0x02e0768
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#define IOMUX_SW_PAD_CTRL_GRP_RGMII_TERM 0x02e0788
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@ -245,13 +245,14 @@ int board_phy_config(struct phy_device *phydev)
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* optimized pad skew values depends on CPU variant on the TQMa6x module:
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* CONFIG_TQMA6Q: i.MX6Q/D
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* CONFIG_TQMA6S: i.MX6S
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* CONFIG_TQMA6DL: i.MX6DL
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*/
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#if defined(CONFIG_TQMA6Q)
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#define MBA6X_KSZ9031_CTRL_SKEW 0x0032
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#define MBA6X_KSZ9031_CLK_SKEW 0x03ff
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#define MBA6X_KSZ9031_RX_SKEW 0x3333
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#define MBA6X_KSZ9031_TX_SKEW 0x2036
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#elif defined(CONFIG_TQMA6S)
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#elif defined(CONFIG_TQMA6S) || defined(CONFIG_TQMA6DL)
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#define MBA6X_KSZ9031_CTRL_SKEW 0x0030
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#define MBA6X_KSZ9031_CLK_SKEW 0x03ff
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#define MBA6X_KSZ9031_RX_SKEW 0x3333
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125
board/tqc/tqma6/tqma6dl.cfg
Normal file
125
board/tqc/tqma6/tqma6dl.cfg
Normal file
@ -0,0 +1,125 @@
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/*
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* Copyright (C) 2014 - 2015 Markus Niebel <Markus.Niebel@tq-group.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*
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* Refer doc/README.imximage for more details about how-to configure
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* and create imximage boot image
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*
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* The syntax is taken as close as possible with the kwbimage
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*/
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/* image version */
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IMAGE_VERSION 2
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#define __ASSEMBLY__
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#include <config.h>
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/*
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* Boot Device : one of
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* spi, sd (the board has no nand neither onenand)
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*/
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#if defined(CONFIG_TQMA6X_MMC_BOOT)
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BOOT_FROM sd
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#elif defined(CONFIG_TQMA6X_SPI_BOOT)
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BOOT_FROM spi
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#endif
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#include "asm/arch/mx6-ddr.h"
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#include "asm/arch/iomux.h"
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#include "asm/arch/crm_regs.h"
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/* TQMa6DL DDR config Rev. 0100E */
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/* IOMUX configuration */
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DATA 4, MX6_IOM_GRP_DDR_TYPE, 0x000C0000
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DATA 4, MX6_IOM_GRP_DDRPKE, 0x00000000
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DATA 4, MX6_IOM_DRAM_SDCLK_0, 0x00008030
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DATA 4, MX6_IOM_DRAM_SDCLK_1, 0x00008030
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DATA 4, MX6_IOM_DRAM_CAS, 0x00008030
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DATA 4, MX6_IOM_DRAM_RAS, 0x00008030
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DATA 4, MX6_IOM_GRP_ADDDS, 0x00000030
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DATA 4, MX6_IOM_DRAM_RESET, 0x000C3030
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DATA 4, MX6_IOM_DRAM_SDCKE0, 0x00003000
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DATA 4, MX6_IOM_DRAM_SDCKE1, 0x00000000
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DATA 4, MX6_IOM_DRAM_SDBA2, 0x00000000
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DATA 4, MX6_IOM_DRAM_SDODT0, 0x00003030
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DATA 4, MX6_IOM_DRAM_SDODT1, 0x00003030
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DATA 4, MX6_IOM_GRP_CTLDS, 0x00000030
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DATA 4, MX6_IOM_DDRMODE_CTL, 0x00020000
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DATA 4, MX6_IOM_DRAM_SDQS0, 0x00000030
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DATA 4, MX6_IOM_DRAM_SDQS1, 0x00000030
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DATA 4, MX6_IOM_DRAM_SDQS2, 0x00000030
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DATA 4, MX6_IOM_DRAM_SDQS3, 0x00000030
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DATA 4, MX6_IOM_DRAM_SDQS4, 0x00000030
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DATA 4, MX6_IOM_DRAM_SDQS5, 0x00000030
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DATA 4, MX6_IOM_DRAM_SDQS6, 0x00000030
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DATA 4, MX6_IOM_DRAM_SDQS7, 0x00000030
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DATA 4, MX6_IOM_GRP_DDRMODE, 0x00020000
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DATA 4, MX6_IOM_GRP_B0DS, 0x00000030
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DATA 4, MX6_IOM_GRP_B1DS, 0x00000030
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DATA 4, MX6_IOM_GRP_B2DS, 0x00000030
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DATA 4, MX6_IOM_GRP_B3DS, 0x00000030
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DATA 4, MX6_IOM_GRP_B4DS, 0x00000030
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DATA 4, MX6_IOM_GRP_B5DS, 0x00000030
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DATA 4, MX6_IOM_GRP_B6DS, 0x00000030
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DATA 4, MX6_IOM_GRP_B7DS, 0x00000030
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DATA 4, MX6_IOM_DRAM_DQM0, 0x00000030
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DATA 4, MX6_IOM_DRAM_DQM1, 0x00000030
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DATA 4, MX6_IOM_DRAM_DQM2, 0x00000030
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DATA 4, MX6_IOM_DRAM_DQM3, 0x00000030
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DATA 4, MX6_IOM_DRAM_DQM4, 0x00000030
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DATA 4, MX6_IOM_DRAM_DQM5, 0x00000030
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DATA 4, MX6_IOM_DRAM_DQM6, 0x00000030
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DATA 4, MX6_IOM_DRAM_DQM7, 0x00000030
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/* memory interface calibration values */
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DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003
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DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003
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DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x00440048
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DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x003D003F
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DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x0029002D
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DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x002B0043
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DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x424C0250
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DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x02300234
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DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x4234023C
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DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x0224022C
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DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x48484C4C
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DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x4C4E4E4C
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DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x36382C36
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DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x34343630
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DATA 4, MX6_MMDC_P0_MPRDDQBY0DL, 0x33333333
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DATA 4, MX6_MMDC_P0_MPRDDQBY1DL, 0x33333333
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DATA 4, MX6_MMDC_P0_MPRDDQBY2DL, 0x33333333
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DATA 4, MX6_MMDC_P0_MPRDDQBY3DL, 0x33333333
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DATA 4, MX6_MMDC_P1_MPRDDQBY0DL, 0x33333333
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DATA 4, MX6_MMDC_P1_MPRDDQBY1DL, 0x33333333
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DATA 4, MX6_MMDC_P1_MPRDDQBY2DL, 0x33333333
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DATA 4, MX6_MMDC_P1_MPRDDQBY3DL, 0x33333333
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DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800
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DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800
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/* configure memory interface */
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DATA 4, MX6_MMDC_P0_MDPDC, 0x0002002D
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DATA 4, MX6_MMDC_P0_MDOTC, 0x00333030
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DATA 4, MX6_MMDC_P0_MDCFG0, 0x3F435333
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DATA 4, MX6_MMDC_P0_MDCFG1, 0xB68E8B63
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DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB
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DATA 4, MX6_MMDC_P0_MDMISC, 0x00001740
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DATA 4, MX6_MMDC_P0_MDSCR, 0x00008000
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DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2
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DATA 4, MX6_MMDC_P0_MDOR, 0x00431023
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DATA 4, MX6_MMDC_P0_MDASP, 0x00000027
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DATA 4, MX6_MMDC_P0_MDCTL, 0x831A0000
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DATA 4, MX6_MMDC_P0_MDSCR, 0x00408032
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DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033
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DATA 4, MX6_MMDC_P0_MDSCR, 0x00048031
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DATA 4, MX6_MMDC_P0_MDSCR, 0x05208030
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DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040
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DATA 4, MX6_MMDC_P0_MDREF, 0x00007800
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DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00022222
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DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00022222
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DATA 4, MX6_MMDC_P0_MDPDC, 0x0002552D
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DATA 4, MX6_MMDC_P0_MAPSR, 0x00001006
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DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000
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#include "clocks.cfg"
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34
configs/tqma6dl_mba6_mmc_defconfig
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34
configs/tqma6dl_mba6_mmc_defconfig
Normal file
@ -0,0 +1,34 @@
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CONFIG_ARM=y
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CONFIG_ARCH_MX6=y
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CONFIG_TARGET_TQMA6=y
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CONFIG_TQMA6DL=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_BOOTDELAY=3
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CONFIG_DEFAULT_FDT_FILE="imx6dl-mba6x.dtb"
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CONFIG_BOARD_EARLY_INIT_F=y
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_BOOTZ=y
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# CONFIG_CMD_IMLS is not set
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# CONFIG_CMD_FLASH is not set
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CONFIG_CMD_MMC=y
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CONFIG_CMD_SF=y
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CONFIG_CMD_SPI=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_USB=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_EXT2=y
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CONFIG_CMD_EXT4=y
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CONFIG_CMD_EXT4_WRITE=y
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CONFIG_CMD_FAT=y
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CONFIG_CMD_FS_GENERIC=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_USB=y
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CONFIG_USB_STORAGE=y
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CONFIG_OF_LIBFDT=y
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35
configs/tqma6dl_mba6_spi_defconfig
Normal file
35
configs/tqma6dl_mba6_spi_defconfig
Normal file
@ -0,0 +1,35 @@
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CONFIG_ARM=y
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CONFIG_ARCH_MX6=y
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CONFIG_TARGET_TQMA6=y
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CONFIG_TQMA6DL=y
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CONFIG_TQMA6X_SPI_BOOT=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_BOOTDELAY=3
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CONFIG_DEFAULT_FDT_FILE="imx6dl-mba6x.dtb"
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CONFIG_BOARD_EARLY_INIT_F=y
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_BOOTZ=y
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# CONFIG_CMD_IMLS is not set
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# CONFIG_CMD_FLASH is not set
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CONFIG_CMD_MMC=y
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CONFIG_CMD_SF=y
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CONFIG_CMD_SPI=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_USB=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_EXT2=y
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CONFIG_CMD_EXT4=y
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CONFIG_CMD_EXT4_WRITE=y
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CONFIG_CMD_FAT=y
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CONFIG_CMD_FS_GENERIC=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_USB=y
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CONFIG_USB_STORAGE=y
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CONFIG_OF_LIBFDT=y
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@ -1,7 +1,7 @@
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/*
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* Copyright (C) 2013, 2014 Markus Niebel <Markus.Niebel@tq-group.com>
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* Copyright (C) 2013, 2014, 2017 Markus Niebel <Markus.Niebel@tq-group.com>
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*
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* Configuration settings for the TQ Systems TQMa6<Q,S> module.
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* Configuration settings for the TQ Systems TQMa6<Q,D,DL,S> module.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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@ -20,7 +20,7 @@
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/* place code in last 4 MiB of RAM */
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#if defined(CONFIG_TQMA6S)
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#define CONFIG_SYS_TEXT_BASE 0x2fc00000
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#elif defined(CONFIG_TQMA6Q)
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#elif defined(CONFIG_TQMA6Q) || defined(CONFIG_TQMA6DL)
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#define CONFIG_SYS_TEXT_BASE 0x4fc00000
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#endif
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@ -28,8 +28,10 @@
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#if defined(CONFIG_TQMA6S)
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#define PHYS_SDRAM_SIZE (512u * SZ_1M)
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#elif defined(CONFIG_TQMA6DL)
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#define PHYS_SDRAM_SIZE (SZ_1G)
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#elif defined(CONFIG_TQMA6Q)
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#define PHYS_SDRAM_SIZE (1024u * SZ_1M)
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#define PHYS_SDRAM_SIZE (SZ_1G)
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#endif
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#define CONFIG_MXC_UART
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@ -1,7 +1,8 @@
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/*
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* Copyright (C) 2013 - 2015 Markus Niebel <Markus.Niebel@tq-group.com>
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* Copyright (C) 2013 - 2017 Markus Niebel <Markus.Niebel@tq-group.com>
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*
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* Configuration settings for the TQ Systems TQMa6<Q,S> module.
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* Configuration settings for the TQ Systems TQMa6<Q,D,DL,S> module on
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* MBa6 starter kit
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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