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powerpc/85xx: add some missing sync instructions in the CCSR relocation code

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Calls to tlbwe and tlbsx should be preceded with an isync/msync pair.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Timur Tabi
2011-10-31 13:30:43 -05:00
committed by Kumar Gala
parent c2efa0aa1e
commit 452ad61c3f
1 changed files with 4 additions and 0 deletions
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4
arch/powerpc/cpu/mpc85xx/start.S
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@@ -352,6 +352,8 @@ purge_old_ccsr_tlb:
li r1, 0 li r1, 0
mtspr MAS6, r1 /* Search the current address space and PID */ mtspr MAS6, r1 /* Search the current address space and PID */
isync
msync
tlbsx 0, r8 tlbsx 0, r8
mfspr r1, MAS1 mfspr r1, MAS1
andis. r2, r1, MAS1_VALID@h /* Check for the Valid bit */ andis. r2, r1, MAS1_VALID@h /* Check for the Valid bit */
@@ -359,6 +361,8 @@ purge_old_ccsr_tlb:
rlwinm r1, r1, 0, 1, 31 /* Clear Valid bit */ rlwinm r1, r1, 0, 1, 31 /* Clear Valid bit */
mtspr MAS1, r1 mtspr MAS1, r1
isync
msync
tlbwe tlbwe
1: 1: