cmd: fpga: Move parameter checking for loadfs/loads
There is no reason to check parameters in separate switch before main one. This patch is simplifying error path and checking parameters right after assignment. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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ccd6520327
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44
cmd/fpga.c
44
cmd/fpga.c
@ -123,6 +123,14 @@ int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
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fpga_fsinfo.interface = argv[6];
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fpga_fsinfo.dev_part = argv[7];
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fpga_fsinfo.filename = argv[8];
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/* Blocksize can be zero */
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if (!fpga_fsinfo.interface || !fpga_fsinfo.dev_part ||
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!fpga_fsinfo.filename) {
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puts("ERR: Wrong interface, dev_part or filename\n");
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return CMD_RET_USAGE;
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}
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argc = 5;
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break;
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#endif
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@ -136,6 +144,19 @@ int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
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NULL, 16);
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fpga_sec_info.encflag = (u8)simple_strtoul(argv[6], NULL, 16);
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fpga_sec_info.authflag = (u8)simple_strtoul(argv[5], NULL, 16);
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if (fpga_sec_info.authflag >= FPGA_NO_ENC_OR_NO_AUTH &&
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fpga_sec_info.encflag >= FPGA_NO_ENC_OR_NO_AUTH) {
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puts("ERR: Use <fpga load> for NonSecure bitstream\n");
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return CMD_RET_USAGE;
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}
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if (fpga_sec_info.encflag == FPGA_ENC_USR_KEY &&
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!fpga_sec_info.userkey_addr) {
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puts("ERR: User key not provided\n");
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return CMD_RET_USAGE;
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}
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argc = 5;
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break;
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#endif
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@ -177,29 +198,6 @@ int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
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switch (op) {
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case FPGA_INFO:
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break;
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#if defined(CONFIG_CMD_FPGA_LOADFS)
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case FPGA_LOADFS:
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/* Blocksize can be zero */
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if (!fpga_fsinfo.interface || !fpga_fsinfo.dev_part ||
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!fpga_fsinfo.filename)
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wrong_parms = 1;
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break;
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#endif
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#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
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case FPGA_LOADS:
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if (fpga_sec_info.authflag >= FPGA_NO_ENC_OR_NO_AUTH &&
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fpga_sec_info.encflag >= FPGA_NO_ENC_OR_NO_AUTH) {
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puts("ERR: use <fpga load> for NonSecure bitstream\n");
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wrong_parms = 1;
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}
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if (fpga_sec_info.encflag == FPGA_ENC_USR_KEY &&
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!fpga_sec_info.userkey_addr) {
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wrong_parms = 1;
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puts("ERR:User key not provided\n");
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}
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break;
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#endif
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case FPGA_LOAD:
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case FPGA_LOADP:
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case FPGA_LOADB:
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