dm: mmc: fsl_esdhc: Detect reset failure
Since esdhc_reset() can fail it should return an error code. Update this and also adjust the timeout mechanism to use get_timer(), which is a more common approach. Signed-off-by: Simon Glass <sjg@chromium.org>
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@ -698,18 +698,23 @@ static int esdhc_getcd_common(struct fsl_esdhc_priv *priv)
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return timeout > 0;
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}
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static void esdhc_reset(struct fsl_esdhc *regs)
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static int esdhc_reset(struct fsl_esdhc *regs)
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{
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unsigned long timeout = 100; /* wait max 100 ms */
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ulong start;
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/* reset the controller */
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esdhc_setbits32(®s->sysctl, SYSCTL_RSTA);
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/* hardware clears the bit when it is done */
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while ((esdhc_read32(®s->sysctl) & SYSCTL_RSTA) && --timeout)
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udelay(1000);
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if (!timeout)
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printf("MMC/SD: Reset never completed.\n");
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start = get_timer(0);
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while ((esdhc_read32(®s->sysctl) & SYSCTL_RSTA)) {
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if (get_timer(start) > 100) {
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printf("MMC/SD: Reset never completed.\n");
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return -ETIMEDOUT;
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}
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}
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return 0;
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}
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static int esdhc_getcd(struct mmc *mmc)
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@ -753,6 +758,7 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv)
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struct fsl_esdhc *regs;
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struct mmc *mmc;
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u32 caps, voltage_caps;
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int ret;
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if (!priv)
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return -EINVAL;
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@ -760,7 +766,9 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv)
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regs = priv->esdhc_regs;
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/* First reset the eSDHC controller */
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esdhc_reset(regs);
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ret = esdhc_reset(regs);
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if (ret)
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return ret;
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#ifndef CONFIG_FSL_USDHC
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esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_HCKEN
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