board: arm:: Add support for Broadcom BCM23550
Add support for the Broadcom BCM23550 board. Signed-off-by: Steve Rae <srae@broadcom.com>
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arch/arm/include/asm/arch-bcm235xx/gpio.h
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arch/arm/include/asm/arch-bcm235xx/gpio.h
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/*
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* Copyright 2013 Broadcom Corporation.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __ARCH_BCM235XX_GPIO_H
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#define __ARCH_BCM235XX_GPIO_H
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/*
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* Empty file - cmd_gpio.c requires this. The implementation
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* is in drivers/gpio/kona_gpio.c instead of inlined here.
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*/
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#endif
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arch/arm/include/asm/arch-bcm235xx/sysmap.h
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arch/arm/include/asm/arch-bcm235xx/sysmap.h
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/*
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* Copyright 2013 Broadcom Corporation.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __ARCH_BCM235XX_SYSMAP_H
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#define BSC1_BASE_ADDR 0x3e016000
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#define BSC2_BASE_ADDR 0x3e017000
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#define BSC3_BASE_ADDR 0x3e018000
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#define GPIO2_BASE_ADDR 0x35003000
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#define HSOTG_BASE_ADDR 0x3f120000
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#define HSOTG_CTRL_BASE_ADDR 0x3f130000
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#define KONA_MST_CLK_BASE_ADDR 0x3f001000
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#define KONA_SLV_CLK_BASE_ADDR 0x3e011000
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#define PMU_BSC_BASE_ADDR 0x3500d000
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#define SDIO1_BASE_ADDR 0x3f180000
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#define SDIO2_BASE_ADDR 0x3f190000
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#define SDIO3_BASE_ADDR 0x3f1a0000
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#define SDIO4_BASE_ADDR 0x3f1b0000
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#define TIMER_BASE_ADDR 0x3e00d000
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#define HSOTG_DCTL_OFFSET 0x00000804
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#define HSOTG_DCTL_SFTDISCON_MASK 0x00000002
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#define HSOTG_CTRL_PHY_P1CTL_OFFSET 0x00000008
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#define HSOTG_CTRL_PHY_P1CTL_SOFT_RESET_MASK 0x00000002
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#define HSOTG_CTRL_PHY_P1CTL_NON_DRIVING_MASK 0x00000001
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#endif
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