soc: xilinx: versal: Add soc_xilinx_versal driver

soc_xilinx_versal driver allows identification of family & revision
of versal SoC. This driver is selected by CONFIG_SOC_XILINX_VERSAL.
Probe this driver using platdata U_BOOT_DEVICE structure which is
defined at mach-versal/cpu.c.
Add this config to xilinx_versal_virt_defconfig &
xilinx_versal_mini_ospi_defconfig file to select this driver.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
T Karthik Reddy 2021-08-10 06:50:19 -06:00 committed by Michal Simek
parent a890a53ad2
commit 42e20f52d9
8 changed files with 97 additions and 0 deletions

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@ -546,6 +546,7 @@ S: Maintained
T: git https://source.denx.de/u-boot/custodians/u-boot-microblaze.git T: git https://source.denx.de/u-boot/custodians/u-boot-microblaze.git
F: arch/arm/mach-versal/ F: arch/arm/mach-versal/
F: drivers/net/xilinx_axi_mrmac.* F: drivers/net/xilinx_axi_mrmac.*
F: drivers/soc/soc_xilinx_versal.c
F: drivers/watchdog/xilinx_wwdt.c F: drivers/watchdog/xilinx_wwdt.c
N: (?<!uni)versal N: (?<!uni)versal

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@ -1055,6 +1055,7 @@ config ARCH_VERSAL
select DM_SERIAL select DM_SERIAL
select GPIO_EXTRA_HEADER select GPIO_EXTRA_HEADER
select OF_CONTROL select OF_CONTROL
select SOC_DEVICE
imply BOARD_LATE_INIT imply BOARD_LATE_INIT
imply ENV_VARS_UBOOT_RUNTIME_CONFIG imply ENV_VARS_UBOOT_RUNTIME_CONFIG

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@ -13,6 +13,7 @@
#include <asm/arch/hardware.h> #include <asm/arch/hardware.h>
#include <asm/arch/sys_proto.h> #include <asm/arch/sys_proto.h>
#include <asm/cache.h> #include <asm/cache.h>
#include <dm/platdata.h>
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
@ -120,3 +121,7 @@ int arm_reserve_mmu(void)
return 0; return 0;
} }
#endif #endif
U_BOOT_DRVINFO(soc_xilinx_versal) = {
.name = "soc_xilinx_versal",
};

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@ -65,6 +65,10 @@ struct crp_regs {
#define crp_base ((struct crp_regs *)VERSAL_CRP_BASEADDR) #define crp_base ((struct crp_regs *)VERSAL_CRP_BASEADDR)
#define VERSAL_PS_PMC_VERSION 0xF11A0004
#define VERSAL_PS_VER_MASK GENMASK(7, 0)
#define VERSAL_PS_VER_SHIFT 12
/* Bootmode setting values */ /* Bootmode setting values */
#define BOOT_MODES_MASK 0x0000000F #define BOOT_MODES_MASK 0x0000000F
#define QSPI_MODE_24BIT 0x00000001 #define QSPI_MODE_24BIT 0x00000001

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@ -96,6 +96,7 @@ CONFIG_ZYNQ_GEM=y
CONFIG_ARM_DCC=y CONFIG_ARM_DCC=y
CONFIG_PL01X_SERIAL=y CONFIG_PL01X_SERIAL=y
CONFIG_XILINX_UARTLITE=y CONFIG_XILINX_UARTLITE=y
CONFIG_SOC_XILINX_VERSAL=y
CONFIG_SPI=y CONFIG_SPI=y
CONFIG_DM_SPI=y CONFIG_DM_SPI=y
CONFIG_ZYNQ_SPI=y CONFIG_ZYNQ_SPI=y

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@ -24,6 +24,14 @@ config SOC_XILINX_ZYNQMP
This allows other drivers to verify the SoC familiy & revision This allows other drivers to verify the SoC familiy & revision
using matching SoC attributes. using matching SoC attributes.
config SOC_XILINX_VERSAL
bool "Enable SoC Device ID driver for Xilinx Versal"
depends on SOC_DEVICE && ARCH_VERSAL
help
Enable this option to select SoC device id driver for Xilinx Versal.
This allows other drivers to verify the SoC familiy & revision using
matching SoC attributes.
source "drivers/soc/ti/Kconfig" source "drivers/soc/ti/Kconfig"
endmenu endmenu

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@ -7,3 +7,4 @@ obj-$(CONFIG_SOC_DEVICE) += soc-uclass.o
obj-$(CONFIG_SOC_DEVICE_TI_K3) += soc_ti_k3.o obj-$(CONFIG_SOC_DEVICE_TI_K3) += soc_ti_k3.o
obj-$(CONFIG_SANDBOX) += soc_sandbox.o obj-$(CONFIG_SANDBOX) += soc_sandbox.o
obj-$(CONFIG_SOC_XILINX_ZYNQMP) += soc_xilinx_zynqmp.o obj-$(CONFIG_SOC_XILINX_ZYNQMP) += soc_xilinx_zynqmp.o
obj-$(CONFIG_SOC_XILINX_VERSAL) += soc_xilinx_versal.o

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@ -0,0 +1,76 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Xilinx Versal SOC driver
*
* Copyright (C) 2021 Xilinx, Inc.
*/
#include <common.h>
#include <dm.h>
#include <soc.h>
#include <zynqmp_firmware.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
/*
* v1 -> 0x10 - ES1
* v2 -> 0x20 - Production
*/
static const char versal_family[] = "Versal";
struct soc_xilinx_versal_priv {
const char *family;
char revision;
};
static int soc_xilinx_versal_get_family(struct udevice *dev, char *buf, int size)
{
struct soc_xilinx_versal_priv *priv = dev_get_priv(dev);
return snprintf(buf, size, "%s", priv->family);
}
static int soc_xilinx_versal_get_revision(struct udevice *dev, char *buf, int size)
{
struct soc_xilinx_versal_priv *priv = dev_get_priv(dev);
return snprintf(buf, size, "v%d", priv->revision);
}
static const struct soc_ops soc_xilinx_versal_ops = {
.get_family = soc_xilinx_versal_get_family,
.get_revision = soc_xilinx_versal_get_revision,
};
static int soc_xilinx_versal_probe(struct udevice *dev)
{
struct soc_xilinx_versal_priv *priv = dev_get_priv(dev);
u32 ret_payload[4];
int ret;
priv->family = versal_family;
if (IS_ENABLED(CONFIG_ZYNQMP_FIRMWARE)) {
ret = xilinx_pm_request(PM_GET_CHIPID, 0, 0, 0, 0,
ret_payload);
if (ret)
return ret;
} else {
ret_payload[2] = readl(VERSAL_PS_PMC_VERSION);
if (!ret_payload[2])
return -EINVAL;
}
priv->revision = ret_payload[2] >> VERSAL_PS_VER_SHIFT;
return 0;
}
U_BOOT_DRIVER(soc_xilinx_versal) = {
.name = "soc_xilinx_versal",
.id = UCLASS_SOC,
.ops = &soc_xilinx_versal_ops,
.probe = soc_xilinx_versal_probe,
.priv_auto = sizeof(struct soc_xilinx_versal_priv),
.flags = DM_FLAG_PRE_RELOC,
};