ARM: tegra: restrict usable RAM size further
Additionally, ARM64 devices typically run a secure monitor in EL3 and U-Boot in EL2, and set up some secure RAM carve-outs to contain the EL3 code and data. These carve-outs are located at the top of 32-bit address space. Restrict U-Boot's RAM usage to well below the location of those carve-outs. Ideally, we would the secure monitor would inform U-Boot of exactly which RAM it could use at run-time. However, I'm not sure how to do that at present (and even if such a mechanism does exist, it would likely not be generic across all forms of secure monitor). Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
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@ -290,11 +290,20 @@ void pad_init_mmc(struct mmc_host *host)
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* 32-bits of the physical address space. Cap the maximum usable RAM area
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* 32-bits of the physical address space. Cap the maximum usable RAM area
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* at 4 GiB to avoid DMA buffers from being allocated beyond the 32-bit
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* at 4 GiB to avoid DMA buffers from being allocated beyond the 32-bit
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* boundary that most devices can address.
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* boundary that most devices can address.
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*
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* Additionally, ARM64 devices typically run a secure monitor in EL3 and
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* U-Boot in EL2, and set up some secure RAM carve-outs to contain the EL3
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* code and data. These carve-outs are located at the top of 32-bit address
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* space. Restrict U-Boot's RAM usage to well below the location of those
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* carve-outs. Ideally, we would the secure monitor would inform U-Boot of
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* exactly which RAM it could use at run-time. However, I'm not sure how to
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* do that at present (and even if such a mechanism does exist, it would
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* likely not be generic across all forms of secure monitor).
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*/
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*/
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ulong board_get_usable_ram_top(ulong total_size)
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ulong board_get_usable_ram_top(ulong total_size)
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{
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{
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if (gd->ram_top > 0x100000000)
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if (gd->ram_top > 0xe0000000)
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return 0x100000000;
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return 0xe0000000;
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return gd->ram_top;
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return gd->ram_top;
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}
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}
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