diff --git a/drivers/watchdog/designware_wdt.c b/drivers/watchdog/designware_wdt.c
index f8df1916b5..447a22d3b3 100644
--- a/drivers/watchdog/designware_wdt.c
+++ b/drivers/watchdog/designware_wdt.c
@@ -132,7 +132,7 @@ static int designware_wdt_probe(struct udevice *dev)
 		goto err;
 	}
 #else
-	priv->clk_khz = CONFIG_DW_WDT_CLOCK_KHZ;
+	priv->clk_khz = CFG_DW_WDT_CLOCK_KHZ;
 #endif
 
 	if (CONFIG_IS_ENABLED(DM_RESET) &&
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index 088cd4d4f7..d0f5331d45 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -64,7 +64,7 @@
 /*
  * L4 Watchdog
  */
-#define CONFIG_DW_WDT_CLOCK_KHZ		25000
+#define CFG_DW_WDT_CLOCK_KHZ		25000
 
 /*
  * NAND Support
diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h
index 47089f312d..df3927297b 100644
--- a/include/configs/socfpga_soc64_common.h
+++ b/include/configs/socfpga_soc64_common.h
@@ -90,10 +90,10 @@
 #ifdef CONFIG_TARGET_SOCFPGA_STRATIX10
 #ifndef __ASSEMBLY__
 unsigned int cm_get_l4_sys_free_clk_hz(void);
-#define CONFIG_DW_WDT_CLOCK_KHZ		(cm_get_l4_sys_free_clk_hz() / 1000)
+#define CFG_DW_WDT_CLOCK_KHZ		(cm_get_l4_sys_free_clk_hz() / 1000)
 #endif
 #else
-#define CONFIG_DW_WDT_CLOCK_KHZ		100000
+#define CFG_DW_WDT_CLOCK_KHZ		100000
 #endif
 
 /*