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Convert CONFIG_SYS_NAND_HW_ECC to Kconfig

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This converts the following to Kconfig:
   CONFIG_SYS_NAND_HW_ECC

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Tom Rini 2022-11-12 17:36:45 -05:00
parent 60db32502c
commit 41fa8f471d
12 changed files with 16 additions and 15 deletions
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1
configs/da850evm_nand_defconfig
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@ -86,7 +86,6 @@ CONFIG_DM_MTD=y
CONFIG_MTD_RAW_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_DAVINCI=y CONFIG_NAND_DAVINCI=y
CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST=y
CONFIG_SYS_NAND_HW_ECC_OOBFIRST=y CONFIG_SYS_NAND_HW_ECC_OOBFIRST=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000 CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_PAGE_COUNT=0x40 CONFIG_SYS_NAND_PAGE_COUNT=0x40

1
configs/k2e_evm_defconfig
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@ -79,7 +79,6 @@ CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_DAVINCI=y CONFIG_NAND_DAVINCI=y
CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y
CONFIG_SF_DEFAULT_SPEED=30000000 CONFIG_SF_DEFAULT_SPEED=30000000
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y

1
configs/k2e_hs_evm_defconfig
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@ -54,7 +54,6 @@ CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_DAVINCI=y CONFIG_NAND_DAVINCI=y
CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y
CONFIG_SF_DEFAULT_SPEED=30000000 CONFIG_SF_DEFAULT_SPEED=30000000
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y

1
configs/k2hk_evm_defconfig
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@ -79,7 +79,6 @@ CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_DAVINCI=y CONFIG_NAND_DAVINCI=y
CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y
CONFIG_SF_DEFAULT_SPEED=30000000 CONFIG_SF_DEFAULT_SPEED=30000000
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y

1
configs/k2hk_hs_evm_defconfig
View File

@ -54,7 +54,6 @@ CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_DAVINCI=y CONFIG_NAND_DAVINCI=y
CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y
CONFIG_SF_DEFAULT_SPEED=30000000 CONFIG_SF_DEFAULT_SPEED=30000000
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y

1
configs/k2l_evm_defconfig
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@ -79,7 +79,6 @@ CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_DAVINCI=y CONFIG_NAND_DAVINCI=y
CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y
CONFIG_SF_DEFAULT_SPEED=30000000 CONFIG_SF_DEFAULT_SPEED=30000000
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y

1
configs/k2l_hs_evm_defconfig
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@ -57,7 +57,6 @@ CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_DAVINCI=y CONFIG_NAND_DAVINCI=y
CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y
CONFIG_SF_DEFAULT_SPEED=30000000 CONFIG_SF_DEFAULT_SPEED=30000000
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y

1
configs/omapl138_lcdk_defconfig
View File

@ -83,7 +83,6 @@ CONFIG_DM_MTD=y
CONFIG_MTD_RAW_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_DAVINCI=y CONFIG_NAND_DAVINCI=y
CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST=y
CONFIG_SYS_NAND_HW_ECC_OOBFIRST=y CONFIG_SYS_NAND_HW_ECC_OOBFIRST=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000 CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_PAGE_COUNT=0x40 CONFIG_SYS_NAND_PAGE_COUNT=0x40

14
drivers/mtd/nand/raw/Kconfig
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@ -148,9 +148,21 @@ config NAND_DAVINCI
Enable this driver for NAND flash controllers available in TI Davinci Enable this driver for NAND flash controllers available in TI Davinci
and Keystone2 platforms and Keystone2 platforms
choice
prompt "Type of ECC used on NAND"
default SYS_NAND_4BIT_HW_ECC_OOBFIRST
depends on NAND_DAVINCI
config SYS_NAND_HW_ECC
bool "Use 1-bit HW ECC"
config SYS_NAND_4BIT_HW_ECC_OOBFIRST config SYS_NAND_4BIT_HW_ECC_OOBFIRST
bool "Use 4-bit HW ECC with OOB at the front" bool "Use 4-bit HW ECC with OOB at the front"
depends on NAND_DAVINCI
config SYS_NAND_SOFT_ECC
bool "Use software ECC"
endchoice
config KEYSTONE_RBL_NAND config KEYSTONE_RBL_NAND
depends on ARCH_KEYSTONE depends on ARCH_KEYSTONE

7
drivers/mtd/nand/raw/davinci_nand.c
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@ -766,10 +766,7 @@ static void davinci_nand_init(struct nand_chip *nand)
nand->ecc.calculate = nand_davinci_calculate_ecc; nand->ecc.calculate = nand_davinci_calculate_ecc;
nand->ecc.correct = nand_davinci_correct_data; nand->ecc.correct = nand_davinci_correct_data;
nand->ecc.hwctl = nand_davinci_enable_hwecc; nand->ecc.hwctl = nand_davinci_enable_hwecc;
#else #elif defined(CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST)
nand->ecc.mode = NAND_ECC_SOFT;
#endif /* CONFIG_SYS_NAND_HW_ECC */
#ifdef CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
nand->ecc.mode = NAND_ECC_HW_OOB_FIRST; nand->ecc.mode = NAND_ECC_HW_OOB_FIRST;
nand->ecc.size = 512; nand->ecc.size = 512;
nand->ecc.bytes = 10; nand->ecc.bytes = 10;
@ -778,6 +775,8 @@ static void davinci_nand_init(struct nand_chip *nand)
nand->ecc.correct = nand_davinci_4bit_correct_data; nand->ecc.correct = nand_davinci_4bit_correct_data;
nand->ecc.hwctl = nand_davinci_4bit_enable_hwecc; nand->ecc.hwctl = nand_davinci_4bit_enable_hwecc;
nand->ecc.layout = &nand_davinci_4bit_layout_oobfirst; nand->ecc.layout = &nand_davinci_4bit_layout_oobfirst;
#elif defined(CONFIG_SYS_NAND_SOFT_ECC)
nand->ecc.mode = NAND_ECC_SOFT;
#endif #endif
/* Set address of hardware control function */ /* Set address of hardware control function */
nand->cmd_ctrl = nand_davinci_hwcontrol; nand->cmd_ctrl = nand_davinci_hwcontrol;

1
include/configs/da850evm.h
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@ -112,7 +112,6 @@
#define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE #define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE
#define CONFIG_SYS_NAND_MASK_CLE 0x10 #define CONFIG_SYS_NAND_MASK_CLE 0x10
#define CONFIG_SYS_NAND_MASK_ALE 0x8 #define CONFIG_SYS_NAND_MASK_ALE 0x8
#undef CONFIG_SYS_NAND_HW_ECC
#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x40000 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x40000
#define CONFIG_SYS_NAND_U_BOOT_DST 0xc1080000 #define CONFIG_SYS_NAND_U_BOOT_DST 0xc1080000
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST

1
include/configs/omapl138_lcdk.h
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@ -110,7 +110,6 @@
#define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE #define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE
#define CONFIG_SYS_NAND_MASK_CLE 0x10 #define CONFIG_SYS_NAND_MASK_CLE 0x10
#define CONFIG_SYS_NAND_MASK_ALE 0x8 #define CONFIG_SYS_NAND_MASK_ALE 0x8
#undef CONFIG_SYS_NAND_HW_ECC
#define CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC #define CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC
#define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K #define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K
#define CONFIG_SYS_NAND_U_BOOT_DST 0xc1080000 #define CONFIG_SYS_NAND_U_BOOT_DST 0xc1080000