fsl/ls1021qds: Add deep sleep support
Add deep sleep support on Freescale LS1021QDS platform. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> [York Sun: Fix conflict in fdt.c] Reviewed-by: York Sun <yorksun@freescale.com>
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@ -124,6 +124,25 @@ void ft_cpu_setup(void *blob, bd_t *bd)
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do_fixup_by_compat_u32(blob, "fsl,qoriq-sysclk-2.0",
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"clock-frequency", CONFIG_SYS_CLK_FREQ, 1);
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#if defined(CONFIG_DEEP_SLEEP) && defined(CONFIG_SD_BOOT)
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#define UBOOT_HEAD_LEN 0x1000
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/*
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* Reserved memory in SD boot deep sleep case.
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* Second stage uboot binary and malloc space should be reserved.
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* If the memory they occupied has not been reserved, then this
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* space would be used by kernel and overwritten in uboot when
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* deep sleep resume, which cause deep sleep failed.
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* Since second uboot binary has a head, that space need to be
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* reserved either(assuming its size is less than 0x1000).
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*/
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off = fdt_add_mem_rsv(blob, CONFIG_SYS_TEXT_BASE - UBOOT_HEAD_LEN,
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CONFIG_SYS_MONITOR_LEN + CONFIG_SYS_SPL_MALLOC_SIZE +
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UBOOT_HEAD_LEN);
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if (off < 0)
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printf("Failed to reserve memory for SD boot deep sleep: %s\n",
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fdt_strerror(off));
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#endif
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#if defined(CONFIG_FSL_ESDHC)
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fdt_fixup_esdhc(blob, bd);
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#endif
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@ -7,6 +7,7 @@
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#include <common.h>
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#include <fsl_ddr_sdram.h>
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#include <fsl_ddr_dimm_params.h>
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#include <asm/io.h>
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#include "ddr.h"
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DECLARE_GLOBAL_DATA_PTR;
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@ -149,6 +150,17 @@ int fsl_ddr_get_dimm_params(dimm_params_t *pdimm,
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}
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#endif
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#if defined(CONFIG_DEEP_SLEEP)
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void board_mem_sleep_setup(void)
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{
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void __iomem *qixis_base = (void *)QIXIS_BASE;
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/* does not provide HW signals for power management */
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clrbits_8(qixis_base + 0x21, 0x2);
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udelay(1);
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}
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#endif
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phys_size_t initdram(int board_type)
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{
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phys_size_t dram_size;
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@ -159,6 +171,11 @@ phys_size_t initdram(int board_type)
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#else
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dram_size = fsl_ddr_sdram_size();
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#endif
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#if defined(CONFIG_DEEP_SLEEP) && !defined(CONFIG_SPL_BUILD)
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fsl_dp_resume();
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#endif
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return dram_size;
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}
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@ -20,6 +20,7 @@
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#include <fsl_sec.h>
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#include <spl.h>
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#include "../common/sleep.h"
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#include "../common/qixis.h"
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#include "ls1021aqds_qixis.h"
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#ifdef CONFIG_U_QE
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@ -218,6 +219,11 @@ int board_early_init_f(void)
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* allow barrier transaction to DDR again */
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out_le32(&cci->ctrl_ord, CCI400_CTRLORD_TERM_BARRIER);
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#if defined(CONFIG_DEEP_SLEEP)
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if (is_warm_boot())
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fsl_dp_disable_console();
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#endif
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return 0;
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}
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@ -251,6 +257,11 @@ void board_init_f(ulong dummy)
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get_clocks();
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#if defined(CONFIG_DEEP_SLEEP)
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if (is_warm_boot())
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fsl_dp_disable_console();
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#endif
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preloader_console_init();
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#ifdef CONFIG_SPL_I2C_SUPPORT
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@ -544,6 +555,21 @@ int board_init(void)
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return 0;
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}
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#if defined(CONFIG_DEEP_SLEEP)
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void board_sleep_prepare(void)
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{
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struct ccsr_cci400 __iomem *cci = (void *)CONFIG_SYS_CCI400_ADDR;
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/* Set CCI-400 control override register to
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* enable barrier transaction */
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out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER);
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#ifdef CONFIG_LS102XA_NS_ACCESS
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enable_devices_ns_access(ns_dev, ARRAY_SIZE(ns_dev));
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#endif
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}
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#endif
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int ft_board_setup(void *blob, bd_t *bd)
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{
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ft_cpu_setup(blob, bd);
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@ -19,6 +19,11 @@
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_DEEP_SLEEP
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#if defined(CONFIG_DEEP_SLEEP)
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#define CONFIG_SILENT_CONSOLE
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#endif
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/*
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* Size of malloc() pool
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*/
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@ -72,7 +77,8 @@ unsigned long get_board_ddr_clk(void);
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#define CONFIG_SPL_PAD_TO 0x1c000
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#define CONFIG_SYS_TEXT_BASE 0x82000000
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#define CONFIG_SYS_SPL_MALLOC_START 0x80200000
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#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE + \
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CONFIG_SYS_MONITOR_LEN)
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#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
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#define CONFIG_SPL_BSS_START_ADDR 0x80100000
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#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
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