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mmc: tegra: allow disabling external clock loopback

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Introduce CONFIG_TEGRA124_MMC_DISABLE_EXT_LOOPBACK to disable the external clock
loopback and use the internal one on SDMMC3 as per the SDMMC_VENDOR_MISC_CNTRL_0
register's SDMMC_SPARE1 bits being set to 0xfffd according to the TRM.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This commit is contained in:
Marcel Ziswiler 2017-03-25 01:18:22 +01:00 committed by Tom Warren
parent f38f5f4bcf
commit 4119b7098c
3 changed files with 29 additions and 0 deletions
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2
arch/arm/include/asm/arch-tegra/tegra_mmc.h
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@ -108,6 +108,8 @@ struct tegra_mmc {
#define TEGRA_MMC_CLKCON_SDCLK_FREQ_SEL_SHIFT 8 #define TEGRA_MMC_CLKCON_SDCLK_FREQ_SEL_SHIFT 8
#define TEGRA_MMC_CLKCON_SDCLK_FREQ_SEL_MASK (0xff << 8) #define TEGRA_MMC_CLKCON_SDCLK_FREQ_SEL_MASK (0xff << 8)
#define TEGRA_MMC_MISCON_ENABLE_EXT_LOOPBACK (1 << 17)
#define TEGRA_MMC_SWRST_SW_RESET_FOR_ALL (1 << 0) #define TEGRA_MMC_SWRST_SW_RESET_FOR_ALL (1 << 0)
#define TEGRA_MMC_SWRST_SW_RESET_FOR_CMD_LINE (1 << 1) #define TEGRA_MMC_SWRST_SW_RESET_FOR_CMD_LINE (1 << 1)
#define TEGRA_MMC_SWRST_SW_RESET_FOR_DAT_LINE (1 << 2) #define TEGRA_MMC_SWRST_SW_RESET_FOR_DAT_LINE (1 << 2)

11
drivers/mmc/Kconfig
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@ -367,6 +367,17 @@ config MMC_SUNXI
endif endif
config TEGRA124_MMC_DISABLE_EXT_LOOPBACK
bool "Disable external clock loopback"
depends on MMC_SDHCI_TEGRA && TEGRA124
help
Disable the external clock loopback and use the internal one on SDMMC3
as per the SDMMC_VENDOR_MISC_CNTRL_0 register's SDMMC_SPARE1 bits
being set to 0xfffd according to the TRM.
TODO(marcel.ziswiler@toradex.com): Move to device tree controlled
approach once proper kernel integration made it mainline.
endmenu endmenu
config SYS_FSL_ERRATUM_ESDHC111 config SYS_FSL_ERRATUM_ESDHC111

16
drivers/mmc/tegra_mmc.c
View File

@ -513,6 +513,22 @@ static int tegra_mmc_init(struct mmc *mmc)
tegra_mmc_reset(priv, mmc); tegra_mmc_reset(priv, mmc);
#if defined(CONFIG_TEGRA124_MMC_DISABLE_EXT_LOOPBACK)
/*
* Disable the external clock loopback and use the internal one on
* SDMMC3 as per the SDMMC_VENDOR_MISC_CNTRL_0 register's SDMMC_SPARE1
* bits being set to 0xfffd according to the TRM.
*
* TODO(marcel.ziswiler@toradex.com): Move to device tree controlled
* approach once proper kernel integration made it mainline.
*/
if (priv->reg == (void *)0x700b0400) {
mask = readl(&priv->reg->venmiscctl);
mask &= ~TEGRA_MMC_MISCON_ENABLE_EXT_LOOPBACK;
writel(mask, &priv->reg->venmiscctl);
}
#endif
priv->version = readw(&priv->reg->hcver); priv->version = readw(&priv->reg->hcver);
debug("host version = %x\n", priv->version); debug("host version = %x\n", priv->version);