omap3: cm-t3517: add LCD/DVI and splash support
Add support for splash screen on both DVI and SCF0403 LCD. Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> Reviewed-by: Tom Rini <trini@ti.com>
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@ -85,6 +85,10 @@ void set_muxconf_regs(void)
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/* SB-T35 Ethernet */
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MUX_VAL(CP(GPMC_NCS4), (IEN | PTU | EN | M0));
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/* DVI enable */
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MUX_VAL(CP(GPMC_NCS3), (IDIS | PTU | DIS | M4));/*GPIO_54*/
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/* DataImage backlight */
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MUX_VAL(CP(GPMC_NCS7), (IDIS | PTU | DIS | M4));/*GPIO_58*/
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/* SB-T35 SD/MMC WP GPIO59 */
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MUX_VAL(CP(GPMC_CLK), (IEN | PTU | EN | M4)); /*GPIO_59*/
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@ -124,6 +128,36 @@ void set_muxconf_regs(void)
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MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | EN | M0));
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MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | EN | M0));
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/* DSS */
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MUX_VAL(CP(DSS_PCLK), (IDIS | PTD | DIS | M0));
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MUX_VAL(CP(DSS_HSYNC), (IDIS | PTD | DIS | M0));
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MUX_VAL(CP(DSS_VSYNC), (IDIS | PTD | DIS | M0));
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MUX_VAL(CP(DSS_ACBIAS), (IDIS | PTD | DIS | M0));
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MUX_VAL(CP(DSS_DATA0), (IDIS | PTD | DIS | M0));
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MUX_VAL(CP(DSS_DATA1), (IDIS | PTD | DIS | M0));
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MUX_VAL(CP(DSS_DATA2), (IDIS | PTD | DIS | M0));
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MUX_VAL(CP(DSS_DATA3), (IDIS | PTD | DIS | M0));
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MUX_VAL(CP(DSS_DATA4), (IDIS | PTD | DIS | M0));
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MUX_VAL(CP(DSS_DATA5), (IDIS | PTD | DIS | M0));
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MUX_VAL(CP(DSS_DATA6), (IDIS | PTD | DIS | M0));
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MUX_VAL(CP(DSS_DATA7), (IDIS | PTD | DIS | M0));
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MUX_VAL(CP(DSS_DATA8), (IDIS | PTD | DIS | M0));
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MUX_VAL(CP(DSS_DATA9), (IDIS | PTD | DIS | M0));
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MUX_VAL(CP(DSS_DATA10), (IDIS | PTD | DIS | M0));
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MUX_VAL(CP(DSS_DATA11), (IDIS | PTD | DIS | M0));
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MUX_VAL(CP(DSS_DATA12), (IDIS | PTD | DIS | M0));
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MUX_VAL(CP(DSS_DATA13), (IDIS | PTD | DIS | M0));
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MUX_VAL(CP(DSS_DATA14), (IDIS | PTD | DIS | M0));
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MUX_VAL(CP(DSS_DATA15), (IDIS | PTD | DIS | M0));
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MUX_VAL(CP(DSS_DATA16), (IDIS | PTD | DIS | M0));
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MUX_VAL(CP(DSS_DATA17), (IDIS | PTD | DIS | M0));
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MUX_VAL(CP(DSS_DATA18), (IDIS | PTD | DIS | M0));
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MUX_VAL(CP(DSS_DATA19), (IDIS | PTD | DIS | M0));
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MUX_VAL(CP(DSS_DATA20), (IDIS | PTD | DIS | M0));
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MUX_VAL(CP(DSS_DATA21), (IDIS | PTD | DIS | M0));
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MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | DIS | M0));
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MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | DIS | M0));
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/* I2C */
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MUX_VAL(CP(I2C1_SCL), (IEN | PTU | EN | M0));
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MUX_VAL(CP(I2C1_SDA), (IEN | PTU | EN | M0));
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@ -150,8 +184,18 @@ void set_muxconf_regs(void)
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/* Green LED GPIO186 */
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MUX_VAL(CP(SYS_CLKOUT2), (IDIS | PTU | DIS | M4)); /*GPIO_186*/
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/* SPI */
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MUX_VAL(CP(MCBSP1_CLKR), (IEN | PTD | DIS | M1)); /*MCSPI4_CLK*/
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MUX_VAL(CP(MCBSP1_DX), (IEN | PTD | DIS | M1)); /*MCSPI4_SIMO*/
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MUX_VAL(CP(MCBSP1_DR), (IEN | PTD | DIS | M1)); /*MCSPI4_SOMI*/
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MUX_VAL(CP(MCBSP1_FSX), (IEN | PTU | EN | M1)); /*MCSPI4_CS0*/
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/* LCD reset GPIO157 */
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MUX_VAL(CP(MCBSP1_FSR), (IDIS | PTU | DIS | M4)); /*GPIO_157*/
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/* RTC V3020 CS Enable GPIO160 */
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MUX_VAL(CP(MCBSP_CLKS), (IEN | PTD | EN | M4)); /*GPIO_160*/
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/* SB-T35 LVDS Transmitter SHDN GPIO162 */
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MUX_VAL(CP(MCBSP1_CLKX), (IEN | PTU | DIS | M4)); /*GPIO_162*/
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/* USB0 - mUSB */
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MUX_VAL(CP(USB0_DRVBUS), (IEN | PTD | EN | M0));
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@ -302,4 +302,19 @@
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#define CONFIG_OMAP3_GPIO_6 /* GPIO186 is in GPIO bank 6 */
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#endif
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/* Display Configuration */
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#define CONFIG_OMAP3_GPIO_2
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#define CONFIG_OMAP3_GPIO_5
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#define CONFIG_VIDEO_OMAP3
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#define LCD_BPP LCD_COLOR16
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#define CONFIG_LCD
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#define CONFIG_SPLASH_SCREEN
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#define CONFIG_SPLASHIMAGE_GUARD
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#define CONFIG_CMD_BMP
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#define CONFIG_BMP_16BPP
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#define CONFIG_SCF0403_LCD
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#define CONFIG_OMAP3_SPI
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#endif /* __CONFIG_H */
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