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spi: Fix zynq SPI binding

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Zynq is using Cadence IP where binding is documented in the Linux kernel
and there is no reason to use different binding.
Synchronize it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
Michal Simek
2015-07-22 10:47:33 +02:00
parent 3ffcdc7aaf
commit 40b383fa84
3 changed files with 22 additions and 19 deletions
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4
arch/arm/dts/zynq-7000.dtsi
View File

@@ -166,7 +166,7 @@
}; };
spi0: spi@e0006000 { spi0: spi@e0006000 {
compatible = "xlnx,zynq-spi"; compatible = "xlnx,zynq-spi-r1p6";
reg = <0xe0006000 0x1000>; reg = <0xe0006000 0x1000>;
status = "disabled"; status = "disabled";
interrupt-parent = <&intc>; interrupt-parent = <&intc>;
@@ -179,7 +179,7 @@
}; };
spi1: spi@e0007000 { spi1: spi@e0007000 {
compatible = "xlnx,zynq-spi"; compatible = "xlnx,zynq-spi-r1p6";
reg = <0xe0007000 0x1000>; reg = <0xe0007000 0x1000>;
status = "disabled"; status = "disabled";
interrupt-parent = <&intc>; interrupt-parent = <&intc>;

35
doc/device-tree-bindings/spi/spi-zynq.txt
View File

@@ -1,29 +1,32 @@
Zynq SPI controller Device Tree Bindings Cadence SPI controller Device Tree Bindings
---------------------------------------- -------------------------------------------
Required properties: Required properties:
- compatible : Should be "xlnx,spi-zynq". - compatible : Should be "cdns,spi-r1p6" or "xlnx,zynq-spi-r1p6".
- reg : Physical base address and size of SPI registers map. - reg : Physical base address and size of SPI registers map.
- status : Status will be disabled in dtsi and enabled in required dts.
- interrupt-parent : Must be core interrupt controller.
- interrupts : Property with a value describing the interrupt - interrupts : Property with a value describing the interrupt
number. number.
- clocks : Clock phandles (see clock bindings for details). - interrupt-parent : Must be core interrupt controller
- clock-names : List of input clock names - "ref_clk", "pclk" - clock-names : List of input clock names - "ref_clk", "pclk"
(See clock bindings for details). (See clock bindings for details).
- clocks : Clock phandles (see clock bindings for details).
- spi-max-frequency : Maximum SPI clocking speed of device in Hz - spi-max-frequency : Maximum SPI clocking speed of device in Hz
Optional properties:
- num-cs : Number of chip selects used.
If a decoder is used, this will be the number of
chip selects after the decoder.
- is-decoded-cs : Flag to indicate whether decoder is used or not.
Example: Example:
spi@e0006000 { spi@e0007000 {
compatible = "xlnx,zynq-spi"; compatible = "xlnx,zynq-spi-r1p6";
reg = <0xe0006000 0x1000>;
status = "disabled";
interrupt-parent = <&intc>;
interrupts = <0 26 4>;
clocks = <&clkc 25>, <&clkc 34>;
clock-names = "ref_clk", "pclk"; clock-names = "ref_clk", "pclk";
spi-max-frequency = <166666700>; clocks = <&clkc 26>, <&clkc 35>;
#address-cells = <1>; interrupt-parent = <&intc>;
#size-cells = <0>; interrupts = <0 49 4>;
num-cs = <4>;
is-decoded-cs = <0>;
reg = <0xe0007000 0x1000>;
} ; } ;

2
drivers/spi/zynq_spi.c
View File

@@ -309,7 +309,7 @@ static const struct dm_spi_ops zynq_spi_ops = {
}; };
static const struct udevice_id zynq_spi_ids[] = { static const struct udevice_id zynq_spi_ids[] = {
{ .compatible = "xlnx,zynq-spi" }, { .compatible = "xlnx,zynq-spi-r1p6" },
{ } { }
}; };