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clk: ast2600: Add YCLK control for HACE

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Add YCLK enable for HACE, the HW hash engine of
ASPEED AST2600 SoCs.

Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
This commit is contained in:
Joel Stanley
2021-10-27 14:17:26 +08:00
committed by Tom Rini
parent 3d99be97f1
commit 4080714f5e
2 changed files with 25 additions and 2 deletions
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5
arch/arm/include/asm/arch-aspeed/scu_ast2600.h
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@@ -10,8 +10,9 @@
#define SCU_CLKGATE1_EMMC BIT(27)
#define SCU_CLKGATE1_MAC2 BIT(21)
#define SCU_CLKGATE1_MAC1 BIT(20)
#define SCU_CLKGATE1_USB_HUB BIT(14)
#define SCU_CLKGATE1_USB_HOST2 BIT(7)
#define SCU_CLKGATE1_USB_HUB BIT(14)
#define SCU_CLKGATE1_HACE BIT(13)
#define SCU_CLKGATE1_USB_HOST2 BIT(7)
#define SCU_CLKGATE2_FSI BIT(30)
#define SCU_CLKGATE2_MAC4 BIT(21)