mips: ath79: Add support for TPLink WDR4300
Add support for the TPLink WDR4300 router, which is based on the AR9344 MIPS 74Kc CPU and has 128 MiB of RAM. The USB is supported on this system as well. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
This commit is contained in:
committed by
Daniel Schwierzeck
parent
e08539b791
commit
400df30998
15
board/tplink/wdr4300/Kconfig
Normal file
15
board/tplink/wdr4300/Kconfig
Normal file
@@ -0,0 +1,15 @@
|
||||
if BOARD_TPLINK_WDR4300
|
||||
|
||||
config SYS_VENDOR
|
||||
default "tplink"
|
||||
|
||||
config SYS_SOC
|
||||
default "ath79"
|
||||
|
||||
config SYS_BOARD
|
||||
default "wdr4300"
|
||||
|
||||
config SYS_CONFIG_NAME
|
||||
default "tplink_wdr4300"
|
||||
|
||||
endif
|
||||
6
board/tplink/wdr4300/MAINTAINERS
Normal file
6
board/tplink/wdr4300/MAINTAINERS
Normal file
@@ -0,0 +1,6 @@
|
||||
TPLINK_WDR4300 BOARD
|
||||
M: Marek Vasut <marex@denx.de>
|
||||
S: Maintained
|
||||
F: board/tplink/wdr4300/
|
||||
F: include/configs/tplink_wdr4300.h
|
||||
F: configs/tplink_wdr4300_defconfig
|
||||
5
board/tplink/wdr4300/Makefile
Normal file
5
board/tplink/wdr4300/Makefile
Normal file
@@ -0,0 +1,5 @@
|
||||
#
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
#
|
||||
|
||||
obj-y = wdr4300.o
|
||||
74
board/tplink/wdr4300/wdr4300.c
Normal file
74
board/tplink/wdr4300/wdr4300.c
Normal file
@@ -0,0 +1,74 @@
|
||||
/*
|
||||
* Copyright (C) 2016 Marek Vasut <marex@denx.de>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/addrspace.h>
|
||||
#include <asm/types.h>
|
||||
#include <mach/ath79.h>
|
||||
#include <mach/ar71xx_regs.h>
|
||||
#include <mach/ddr.h>
|
||||
#include <debug_uart.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
#ifdef CONFIG_USB
|
||||
static void wdr4300_usb_start(void)
|
||||
{
|
||||
void __iomem *gpio_regs = map_physmem(AR71XX_GPIO_BASE,
|
||||
AR71XX_GPIO_SIZE, MAP_NOCACHE);
|
||||
if (!gpio_regs)
|
||||
return;
|
||||
|
||||
/* Power up the USB HUB. */
|
||||
clrbits_be32(gpio_regs + AR71XX_GPIO_REG_OE, BIT(21) | BIT(22));
|
||||
writel(BIT(21) | BIT(22), gpio_regs + AR71XX_GPIO_REG_SET);
|
||||
mdelay(1);
|
||||
|
||||
ath79_usb_reset();
|
||||
}
|
||||
#else
|
||||
static inline void wdr4300_usb_start(void) {}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BOARD_EARLY_INIT_F
|
||||
int board_early_init_f(void)
|
||||
{
|
||||
void __iomem *regs;
|
||||
|
||||
regs = map_physmem(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE,
|
||||
MAP_NOCACHE);
|
||||
|
||||
/* Assure JTAG is not disconnected. */
|
||||
writel(0x40, regs + AR934X_GPIO_REG_FUNC);
|
||||
|
||||
/* Configure default GPIO input/output regs. */
|
||||
writel(0x3031b, regs + AR71XX_GPIO_REG_OE);
|
||||
writel(0x0f804, regs + AR71XX_GPIO_REG_OUT);
|
||||
|
||||
/* Configure pin multiplexing. */
|
||||
writel(0x00000000, regs + AR934X_GPIO_REG_OUT_FUNC0);
|
||||
writel(0x0b0a0980, regs + AR934X_GPIO_REG_OUT_FUNC1);
|
||||
writel(0x00180000, regs + AR934X_GPIO_REG_OUT_FUNC2);
|
||||
writel(0x00000000, regs + AR934X_GPIO_REG_OUT_FUNC3);
|
||||
writel(0x0000004d, regs + AR934X_GPIO_REG_OUT_FUNC4);
|
||||
writel(0x00000000, regs + AR934X_GPIO_REG_OUT_FUNC5);
|
||||
|
||||
#ifdef CONFIG_DEBUG_UART
|
||||
debug_uart_init();
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
|
||||
ar934x_pll_init(560, 480, 240);
|
||||
ar934x_ddr_init(560, 480, 240);
|
||||
#endif
|
||||
|
||||
wdr4300_usb_start();
|
||||
ath79_eth_reset();
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
Reference in New Issue
Block a user