diff --git a/arch/powerpc/dts/p1010rdb-pa.dts b/arch/powerpc/dts/p1010rdb-pa.dts
index c66c4923ac..360d254d91 100644
--- a/arch/powerpc/dts/p1010rdb-pa.dts
+++ b/arch/powerpc/dts/p1010rdb-pa.dts
@@ -15,3 +15,4 @@
 };
 
 /include/ "p1010si-post.dtsi"
+/include/ "p1010rdb.dtsi"
diff --git a/arch/powerpc/dts/p1010rdb-pa_36b.dts b/arch/powerpc/dts/p1010rdb-pa_36b.dts
index b943de7cbb..062086a8c0 100644
--- a/arch/powerpc/dts/p1010rdb-pa_36b.dts
+++ b/arch/powerpc/dts/p1010rdb-pa_36b.dts
@@ -15,3 +15,4 @@
 };
 
 /include/ "p1010si-post.dtsi"
+/include/ "p1010rdb.dtsi"
diff --git a/arch/powerpc/dts/p1010rdb.dtsi b/arch/powerpc/dts/p1010rdb.dtsi
index 4f58ee2446..20bd570299 100644
--- a/arch/powerpc/dts/p1010rdb.dtsi
+++ b/arch/powerpc/dts/p1010rdb.dtsi
@@ -4,6 +4,12 @@
  *
  * Copyright 2020 NXP
  */
+/ {
+	aliases {
+		spi0 = &espi0;
+	};
+};
+
 &soc {
 	i2c@3000 {
 		rtc@68 {
@@ -11,4 +17,15 @@
 			reg = <0x68>;
 		};
 	};
+
+	spi@7000 {
+		status = "okay";
+		flash@0 {
+			compatible = "jedec,spi-nor";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			reg = <0>;
+			spi-max-frequency = <10000000>; /* input clock */
+		};
+	};
 };