kirkwood_spi: correct access to irq_mask register

Problem appears to have been present since day one but masked because alignment
aborts were not enabled. ca4b55800e "arm, arm926ejs: always do cpu critical
inits" turned on alignment aborts and uncovered this latent problem.

Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Acked-By: Jason Cooper <u-boot@lakedaemon.net>
Tested-By: Holger Brunck <holger.brunck@keymile.com>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
This commit is contained in:
Ian Campbell 2012-01-12 06:10:22 +00:00 committed by Albert ARIBAUD
parent 3d3206f1d4
commit 3f8435516b

View File

@ -66,7 +66,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
debug("data = 0x%08x \n", data);
writel(KWSPI_SMEMRDIRQ, &spireg->irq_cause);
writel(KWSPI_IRQMASK, spireg->irq_mask);
writel(KWSPI_IRQMASK, &spireg->irq_mask);
/* program mpp registers to select SPI_CSn */
if (cs) {