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global: Migrate CONFIG_SMP_PEN_ADDR to CFG

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Perform a simple rename of CONFIG_SMP_PEN_ADDR to CFG_SMP_PEN_ADDR

Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini 2022-12-04 10:13:54 -05:00
parent 59f3a09a6c
commit 3e204427c8
7 changed files with 9 additions and 9 deletions
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4
arch/arm/cpu/armv7/nonsec_virt.S
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@ -205,11 +205,11 @@ ENTRY(_nonsec_init)
bx lr bx lr
ENDPROC(_nonsec_init) ENDPROC(_nonsec_init)
#ifdef CONFIG_SMP_PEN_ADDR #ifdef CFG_SMP_PEN_ADDR
/* void __weak smp_waitloop(unsigned previous_address); */ /* void __weak smp_waitloop(unsigned previous_address); */
WEAK(smp_waitloop) WEAK(smp_waitloop)
wfi wfi
ldr r1, =CONFIG_SMP_PEN_ADDR @ load start address ldr r1, =CFG_SMP_PEN_ADDR @ load start address
ldr r1, [r1] ldr r1, [r1]
#ifdef CONFIG_PEN_ADDR_BIG_ENDIAN #ifdef CONFIG_PEN_ADDR_BIG_ENDIAN
rev r1, r1 rev r1, r1

4
board/samsung/arndale/arndale.c
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@ -112,10 +112,10 @@ int checkboard(void)
} }
#endif #endif
#ifdef CONFIG_SMP_PEN_ADDR #ifdef CFG_SMP_PEN_ADDR
void smp_set_core_boot_addr(unsigned long addr, int corenr) void smp_set_core_boot_addr(unsigned long addr, int corenr)
{ {
writel(addr, CONFIG_SMP_PEN_ADDR); writel(addr, CFG_SMP_PEN_ADDR);
/* make sure this write is really executed */ /* make sure this write is really executed */
__asm__ volatile ("dsb\n"); __asm__ volatile ("dsb\n");

2
include/configs/arndale.h
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@ -16,7 +16,7 @@
/* Miscellaneous configurable options */ /* Miscellaneous configurable options */
#define CONFIG_SMP_PEN_ADDR 0x02020000 #define CFG_SMP_PEN_ADDR 0x02020000
/* The PERIPHBASE in the CBAR register is wrong on the Arndale, so override it */ /* The PERIPHBASE in the CBAR register is wrong on the Arndale, so override it */
#define CFG_ARM_GIC_BASE_ADDRESS 0x10480000 #define CFG_ARM_GIC_BASE_ADDRESS 0x10480000

2
include/configs/km/pg-wcom-ls102xa.h
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@ -158,7 +158,7 @@
{1, {I2C_NULL_HOP} }, \ {1, {I2C_NULL_HOP} }, \
} }
#define CONFIG_SMP_PEN_ADDR 0x01ee0200 #define CFG_SMP_PEN_ADDR 0x01ee0200
#define HWCONFIG_BUFFER_SIZE 256 #define HWCONFIG_BUFFER_SIZE 256

2
include/configs/ls1021aiot.h
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@ -68,7 +68,7 @@
#define FSL_PCIE_COMPAT "fsl,ls1021a-pcie" #define FSL_PCIE_COMPAT "fsl,ls1021a-pcie"
#define CONFIG_SMP_PEN_ADDR 0x01ee0200 #define CFG_SMP_PEN_ADDR 0x01ee0200
#define HWCONFIG_BUFFER_SIZE 256 #define HWCONFIG_BUFFER_SIZE 256

2
include/configs/ls1021aqds.h
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@ -242,7 +242,7 @@
* MMC * MMC
*/ */
#define CONFIG_SMP_PEN_ADDR 0x01ee0200 #define CFG_SMP_PEN_ADDR 0x01ee0200
#define HWCONFIG_BUFFER_SIZE 256 #define HWCONFIG_BUFFER_SIZE 256

2
include/configs/ls1021atwr.h
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@ -133,7 +133,7 @@
/* GPIO */ /* GPIO */
#define CONFIG_SMP_PEN_ADDR 0x01ee0200 #define CFG_SMP_PEN_ADDR 0x01ee0200
#define HWCONFIG_BUFFER_SIZE 256 #define HWCONFIG_BUFFER_SIZE 256