armv8: fsl-layerscape: Make USB masters snoopable
Program register bit of SCFG_SNPCNFGCR_USBxRDSNP and SCFG_SNPCNFGCR_USBxWRSNP(x = 1, 2, 3) to drive USBx read/write snoop signal on LS1043A and LS1046A. Signed-off-by: Ran Wang <ran.wang_1@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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@ -627,10 +627,19 @@ void fsl_lsch2_early_init_f(void)
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#endif
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#endif
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/* Make SEC reads and writes snoopable */
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#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A)
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setbits_be32(&scfg->snpcnfgcr, SCFG_SNPCNFGCR_SECRDSNP |
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SCFG_SNPCNFGCR_SECWRSNP | SCFG_SNPCNFGCR_USB1RDSNP |
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SCFG_SNPCNFGCR_USB1WRSNP | SCFG_SNPCNFGCR_USB2RDSNP |
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SCFG_SNPCNFGCR_USB2WRSNP | SCFG_SNPCNFGCR_USB3RDSNP |
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SCFG_SNPCNFGCR_USB3WRSNP | SCFG_SNPCNFGCR_SATARDSNP |
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SCFG_SNPCNFGCR_SATAWRSNP);
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#else
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setbits_be32(&scfg->snpcnfgcr, SCFG_SNPCNFGCR_SECRDSNP |
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SCFG_SNPCNFGCR_SECWRSNP |
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SCFG_SNPCNFGCR_SATARDSNP |
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SCFG_SNPCNFGCR_SATAWRSNP);
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#endif
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/*
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* Enable snoop requests and DVM message requests for
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@ -409,6 +409,12 @@ struct ccsr_gur {
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#define SCFG_SNPCNFGCR_SECWRSNP 0x40000000
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#define SCFG_SNPCNFGCR_SATARDSNP 0x00800000
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#define SCFG_SNPCNFGCR_SATAWRSNP 0x00400000
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#define SCFG_SNPCNFGCR_USB1RDSNP 0x00200000
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#define SCFG_SNPCNFGCR_USB1WRSNP 0x00100000
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#define SCFG_SNPCNFGCR_USB2RDSNP 0x00008000
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#define SCFG_SNPCNFGCR_USB2WRSNP 0x00010000
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#define SCFG_SNPCNFGCR_USB3RDSNP 0x00002000
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#define SCFG_SNPCNFGCR_USB3WRSNP 0x00004000
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/* RGMIIPCR bit definitions*/
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#define SCFG_RGMIIPCR_EN_AUTO BIT(3)
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