Exynos: Change get_timer() to work correctly
At present get_timer() does not return sane values. It should count up smoothly in milliscond intervals. We can change the PWM to count down at 1MHz, providing a resolution of 1us and a range of about an hour between required get_timer() calls. Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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@ -174,6 +174,12 @@ int pwm_init(int pwm_id, int div, int invert)
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/* set count value */
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offset = pwm_id * 3;
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/*
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* TODO(sjg): Use this as a countdown timer for now. We count down
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* from the maximum value to 0, then reset.
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*/
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timer_rate_hz = -1;
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writel(timer_rate_hz, &pwm->tcntb0 + offset);
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val = readl(&pwm->tcon) & ~(0xf << TCON_OFFSET(pwm_id));
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@ -39,13 +39,33 @@ static inline struct s5p_timer *s5p_get_base_timer(void)
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return (struct s5p_timer *)samsung_get_base_timer();
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}
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/**
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* Read the countdown timer.
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*
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* This operates at 1MHz and counts downwards. It will wrap about every
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* hour (2^32 microseconds).
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*
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* @return current value of timer
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*/
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static unsigned long timer_get_us_down(void)
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{
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struct s5p_timer *const timer = s5p_get_base_timer();
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return readl(&timer->tcnto4);
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}
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int timer_init(void)
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{
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/* PWM Timer 4 */
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pwm_init(4, MUX_DIV_2, 0);
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pwm_init(4, MUX_DIV_4, 0);
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pwm_config(4, 0, 0);
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pwm_enable(4);
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/* Use this as the current monotonic time in us */
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gd->arch.timer_reset_value = 0;
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/* Use this as the last timer value we saw */
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gd->arch.lastinc = timer_get_us_down();
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reset_timer_masked();
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return 0;
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@ -56,48 +76,28 @@ int timer_init(void)
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*/
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unsigned long get_timer(unsigned long base)
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{
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return get_timer_masked() - base;
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ulong now = timer_get_us_down();
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/*
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* Increment the time by the amount elapsed since the last read.
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* The timer may have wrapped around, but it makes no difference to
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* our arithmetic here.
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*/
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gd->arch.timer_reset_value += gd->arch.lastinc - now;
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gd->arch.lastinc = now;
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/* Divide by 1000 to convert from us to ms */
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return gd->arch.timer_reset_value / 1000 - base;
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}
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/* delay x useconds */
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void __udelay(unsigned long usec)
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{
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struct s5p_timer *const timer = s5p_get_base_timer();
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unsigned long tmo, tmp, count_value;
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unsigned long count_value;
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count_value = readl(&timer->tcntb4);
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if (usec >= 1000) {
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/*
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* if "big" number, spread normalization
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* to seconds
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* 1. start to normalize for usec to ticks per sec
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* 2. find number of "ticks" to wait to achieve target
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* 3. finish normalize.
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*/
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tmo = usec / 1000;
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tmo *= (CONFIG_SYS_HZ * count_value);
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tmo /= 1000;
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} else {
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/* else small number, don't kill it prior to HZ multiply */
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tmo = usec * CONFIG_SYS_HZ * count_value;
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tmo /= (1000 * 1000);
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}
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/* get current timestamp */
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tmp = get_current_tick();
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/* if setting this fordward will roll time stamp */
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/* reset "advancing" timestamp to 0, set lastinc value */
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/* else, set advancing stamp wake up time */
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if ((tmo + tmp + 1) < tmp)
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reset_timer_masked();
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else
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tmo += tmp;
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/* loop till event */
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while (get_current_tick() < tmo)
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; /* nop */
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count_value = timer_get_us_down();
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while ((int)(count_value - timer_get_us_down()) < (int)usec)
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;
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}
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void reset_timer_masked(void)
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@ -109,30 +109,6 @@ void reset_timer_masked(void)
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gd->arch.tbl = 0;
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}
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unsigned long get_timer_masked(void)
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{
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struct s5p_timer *const timer = s5p_get_base_timer();
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unsigned long count_value = readl(&timer->tcntb4);
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return get_current_tick() / count_value;
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}
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unsigned long get_current_tick(void)
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{
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struct s5p_timer *const timer = s5p_get_base_timer();
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unsigned long now = readl(&timer->tcnto4);
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unsigned long count_value = readl(&timer->tcntb4);
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if (gd->arch.lastinc >= now)
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gd->arch.tbl += gd->arch.lastinc - now;
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else
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gd->arch.tbl += gd->arch.lastinc + count_value - now;
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gd->arch.lastinc = now;
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return gd->arch.tbl;
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}
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/*
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* This function is derived from PowerPC code (read timebase as long long).
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* On ARM it just returns the timer value.
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