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x86: Support booting SeaBIOS

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SeaBIOS is an open source implementation of a 16-bit x86 BIOS.
It can run in an emulator or natively on x86 hardware with the
use of coreboot. With SeaBIOS's help, we can boot some OSes
that require 16-bit BIOS services like Windows/DOS.

As U-Boot, we have to manually create a table where SeaBIOS gets
system information (eg: E820) from. The table unfortunately has
to follow the coreboot table format as SeaBIOS currently supports
booting as a coreboot payload.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Bin Meng 2016-02-28 23:54:50 -08:00
parent 26f9a9b73a
commit 3cf23719b1
3 changed files with 28 additions and 0 deletions
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10
arch/x86/Kconfig
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@ -449,6 +449,16 @@ config I8042_KEYB
config DM_KEYBOARD
default y
config SEABIOS
bool "Support booting SeaBIOS"
help
SeaBIOS is an open source implementation of a 16-bit X86 BIOS.
It can run in an emulator or natively on X86 hardware with the use
of coreboot/U-Boot. By turning on this option, U-Boot prepares
all the configuration tables that are necessary to boot SeaBIOS.
Check http://www.seabios.org/SeaBIOS for details.
source "arch/x86/lib/efi/Kconfig"
endmenu

3
arch/x86/include/asm/tables.h
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@ -16,6 +16,9 @@
#define ROM_TABLE_ALIGN 1024
/* SeaBIOS expects coreboot tables at address range 0x0000-0x1000 */
#define CB_TABLE_ADDR 0x800
/**
* table_compute_checksum() - Compute a table checksum
*

15
arch/x86/lib/tables.c
View File

@ -10,6 +10,7 @@
#include <asm/smbios.h>
#include <asm/tables.h>
#include <asm/acpi_table.h>
#include <asm/coreboot_tables.h>
/**
* Function prototype to write a specific configuration table
@ -67,22 +68,36 @@ void write_tables(void)
{
u32 rom_table_start = ROM_TABLE_ADDR;
u32 rom_table_end;
#ifdef CONFIG_SEABIOS
u32 high_table, table_size;
struct memory_area cfg_tables[ARRAY_SIZE(table_write_funcs) + 1];
#endif
int i;
for (i = 0; i < ARRAY_SIZE(table_write_funcs); i++) {
rom_table_end = table_write_funcs[i](rom_table_start);
rom_table_end = ALIGN(rom_table_end, ROM_TABLE_ALIGN);
#ifdef CONFIG_SEABIOS
table_size = rom_table_end - rom_table_start;
high_table = (u32)memalign(ROM_TABLE_ALIGN, table_size);
if (high_table) {
memset((void *)high_table, 0, table_size);
table_write_funcs[i](high_table);
cfg_tables[i].start = high_table;
cfg_tables[i].size = table_size;
} else {
printf("%d: no memory for configuration tables\n", i);
}
#endif
rom_table_start = rom_table_end;
}
#ifdef CONFIG_SEABIOS
/* make sure the last item is zero */
cfg_tables[i].size = 0;
write_coreboot_table(CB_TABLE_ADDR, cfg_tables);
#endif
}