From 97fbf26d79701431b4dad1d4eae9d9f837b254cb Mon Sep 17 00:00:00 2001 From: Thomas Schaefer Date: Tue, 28 Mar 2017 11:29:56 -0700 Subject: [PATCH 01/24] drivers: ddr: fsl: fix unused-const-variable warnings Depending on DDR configuration, gcc-6.x will show up unused-const- variable messages. Use __maybe_unused specifier for all dynamic_odt variable definitions to remove these warnings. Memory footprint will not increase as gcc will optimize out unused constants. Signed-off-by: Thomas Schaefer Signed-off-by: York Sun --- drivers/ddr/fsl/options.c | 72 +++++++++++++++++++-------------------- 1 file changed, 36 insertions(+), 36 deletions(-) diff --git a/drivers/ddr/fsl/options.c b/drivers/ddr/fsl/options.c index d6a8fcb216..1b81a7a250 100644 --- a/drivers/ddr/fsl/options.c +++ b/drivers/ddr/fsl/options.c @@ -33,7 +33,7 @@ struct dynamic_odt { /* Quad rank is not verified yet due availability. * Replacing 20 OHM with 34 OHM since DDR4 doesn't have 20 OHM option */ -static const struct dynamic_odt single_Q[4] = { +static __maybe_unused const struct dynamic_odt single_Q[4] = { { /* cs0 */ FSL_DDR_ODT_NEVER, FSL_DDR_ODT_CS_AND_OTHER_DIMM, @@ -60,7 +60,7 @@ static const struct dynamic_odt single_Q[4] = { } }; -static const struct dynamic_odt single_D[4] = { +static __maybe_unused const struct dynamic_odt single_D[4] = { { /* cs0 */ FSL_DDR_ODT_NEVER, FSL_DDR_ODT_ALL, @@ -77,7 +77,7 @@ static const struct dynamic_odt single_D[4] = { {0, 0, 0, 0} }; -static const struct dynamic_odt single_S[4] = { +static __maybe_unused const struct dynamic_odt single_S[4] = { { /* cs0 */ FSL_DDR_ODT_NEVER, FSL_DDR_ODT_ALL, @@ -89,7 +89,7 @@ static const struct dynamic_odt single_S[4] = { {0, 0, 0, 0}, }; -static const struct dynamic_odt dual_DD[4] = { +static __maybe_unused const struct dynamic_odt dual_DD[4] = { { /* cs0 */ FSL_DDR_ODT_NEVER, FSL_DDR_ODT_SAME_DIMM, @@ -116,7 +116,7 @@ static const struct dynamic_odt dual_DD[4] = { } }; -static const struct dynamic_odt dual_DS[4] = { +static __maybe_unused const struct dynamic_odt dual_DS[4] = { { /* cs0 */ FSL_DDR_ODT_NEVER, FSL_DDR_ODT_SAME_DIMM, @@ -137,7 +137,7 @@ static const struct dynamic_odt dual_DS[4] = { }, {0, 0, 0, 0} }; -static const struct dynamic_odt dual_SD[4] = { +static __maybe_unused const struct dynamic_odt dual_SD[4] = { { /* cs0 */ FSL_DDR_ODT_OTHER_DIMM, FSL_DDR_ODT_ALL, @@ -159,7 +159,7 @@ static const struct dynamic_odt dual_SD[4] = { } }; -static const struct dynamic_odt dual_SS[4] = { +static __maybe_unused const struct dynamic_odt dual_SS[4] = { { /* cs0 */ FSL_DDR_ODT_OTHER_DIMM, FSL_DDR_ODT_ALL, @@ -176,7 +176,7 @@ static const struct dynamic_odt dual_SS[4] = { {0, 0, 0, 0} }; -static const struct dynamic_odt dual_D0[4] = { +static __maybe_unused const struct dynamic_odt dual_D0[4] = { { /* cs0 */ FSL_DDR_ODT_NEVER, FSL_DDR_ODT_SAME_DIMM, @@ -193,7 +193,7 @@ static const struct dynamic_odt dual_D0[4] = { {0, 0, 0, 0} }; -static const struct dynamic_odt dual_0D[4] = { +static __maybe_unused const struct dynamic_odt dual_0D[4] = { {0, 0, 0, 0}, {0, 0, 0, 0}, { /* cs2 */ @@ -210,7 +210,7 @@ static const struct dynamic_odt dual_0D[4] = { } }; -static const struct dynamic_odt dual_S0[4] = { +static __maybe_unused const struct dynamic_odt dual_S0[4] = { { /* cs0 */ FSL_DDR_ODT_NEVER, FSL_DDR_ODT_CS, @@ -223,7 +223,7 @@ static const struct dynamic_odt dual_S0[4] = { }; -static const struct dynamic_odt dual_0S[4] = { +static __maybe_unused const struct dynamic_odt dual_0S[4] = { {0, 0, 0, 0}, {0, 0, 0, 0}, { /* cs2 */ @@ -236,7 +236,7 @@ static const struct dynamic_odt dual_0S[4] = { }; -static const struct dynamic_odt odt_unknown[4] = { +static __maybe_unused const struct dynamic_odt odt_unknown[4] = { { /* cs0 */ FSL_DDR_ODT_NEVER, FSL_DDR_ODT_CS, @@ -263,7 +263,7 @@ static const struct dynamic_odt odt_unknown[4] = { } }; #elif defined(CONFIG_SYS_FSL_DDR3) -static const struct dynamic_odt single_Q[4] = { +static __maybe_unused const struct dynamic_odt single_Q[4] = { { /* cs0 */ FSL_DDR_ODT_NEVER, FSL_DDR_ODT_CS_AND_OTHER_DIMM, @@ -290,7 +290,7 @@ static const struct dynamic_odt single_Q[4] = { } }; -static const struct dynamic_odt single_D[4] = { +static __maybe_unused const struct dynamic_odt single_D[4] = { { /* cs0 */ FSL_DDR_ODT_NEVER, FSL_DDR_ODT_ALL, @@ -307,7 +307,7 @@ static const struct dynamic_odt single_D[4] = { {0, 0, 0, 0} }; -static const struct dynamic_odt single_S[4] = { +static __maybe_unused const struct dynamic_odt single_S[4] = { { /* cs0 */ FSL_DDR_ODT_NEVER, FSL_DDR_ODT_ALL, @@ -319,7 +319,7 @@ static const struct dynamic_odt single_S[4] = { {0, 0, 0, 0}, }; -static const struct dynamic_odt dual_DD[4] = { +static __maybe_unused const struct dynamic_odt dual_DD[4] = { { /* cs0 */ FSL_DDR_ODT_NEVER, FSL_DDR_ODT_SAME_DIMM, @@ -346,7 +346,7 @@ static const struct dynamic_odt dual_DD[4] = { } }; -static const struct dynamic_odt dual_DS[4] = { +static __maybe_unused const struct dynamic_odt dual_DS[4] = { { /* cs0 */ FSL_DDR_ODT_NEVER, FSL_DDR_ODT_SAME_DIMM, @@ -367,7 +367,7 @@ static const struct dynamic_odt dual_DS[4] = { }, {0, 0, 0, 0} }; -static const struct dynamic_odt dual_SD[4] = { +static __maybe_unused const struct dynamic_odt dual_SD[4] = { { /* cs0 */ FSL_DDR_ODT_OTHER_DIMM, FSL_DDR_ODT_ALL, @@ -389,7 +389,7 @@ static const struct dynamic_odt dual_SD[4] = { } }; -static const struct dynamic_odt dual_SS[4] = { +static __maybe_unused const struct dynamic_odt dual_SS[4] = { { /* cs0 */ FSL_DDR_ODT_OTHER_DIMM, FSL_DDR_ODT_ALL, @@ -406,7 +406,7 @@ static const struct dynamic_odt dual_SS[4] = { {0, 0, 0, 0} }; -static const struct dynamic_odt dual_D0[4] = { +static __maybe_unused const struct dynamic_odt dual_D0[4] = { { /* cs0 */ FSL_DDR_ODT_NEVER, FSL_DDR_ODT_SAME_DIMM, @@ -423,7 +423,7 @@ static const struct dynamic_odt dual_D0[4] = { {0, 0, 0, 0} }; -static const struct dynamic_odt dual_0D[4] = { +static __maybe_unused const struct dynamic_odt dual_0D[4] = { {0, 0, 0, 0}, {0, 0, 0, 0}, { /* cs2 */ @@ -440,7 +440,7 @@ static const struct dynamic_odt dual_0D[4] = { } }; -static const struct dynamic_odt dual_S0[4] = { +static __maybe_unused const struct dynamic_odt dual_S0[4] = { { /* cs0 */ FSL_DDR_ODT_NEVER, FSL_DDR_ODT_CS, @@ -453,7 +453,7 @@ static const struct dynamic_odt dual_S0[4] = { }; -static const struct dynamic_odt dual_0S[4] = { +static __maybe_unused const struct dynamic_odt dual_0S[4] = { {0, 0, 0, 0}, {0, 0, 0, 0}, { /* cs2 */ @@ -466,7 +466,7 @@ static const struct dynamic_odt dual_0S[4] = { }; -static const struct dynamic_odt odt_unknown[4] = { +static __maybe_unused const struct dynamic_odt odt_unknown[4] = { { /* cs0 */ FSL_DDR_ODT_NEVER, FSL_DDR_ODT_CS, @@ -493,14 +493,14 @@ static const struct dynamic_odt odt_unknown[4] = { } }; #else /* CONFIG_SYS_FSL_DDR3 */ -static const struct dynamic_odt single_Q[4] = { +static __maybe_unused const struct dynamic_odt single_Q[4] = { {0, 0, 0, 0}, {0, 0, 0, 0}, {0, 0, 0, 0}, {0, 0, 0, 0} }; -static const struct dynamic_odt single_D[4] = { +static __maybe_unused const struct dynamic_odt single_D[4] = { { /* cs0 */ FSL_DDR_ODT_NEVER, FSL_DDR_ODT_ALL, @@ -517,7 +517,7 @@ static const struct dynamic_odt single_D[4] = { {0, 0, 0, 0} }; -static const struct dynamic_odt single_S[4] = { +static __maybe_unused const struct dynamic_odt single_S[4] = { { /* cs0 */ FSL_DDR_ODT_NEVER, FSL_DDR_ODT_ALL, @@ -529,7 +529,7 @@ static const struct dynamic_odt single_S[4] = { {0, 0, 0, 0}, }; -static const struct dynamic_odt dual_DD[4] = { +static __maybe_unused const struct dynamic_odt dual_DD[4] = { { /* cs0 */ FSL_DDR_ODT_OTHER_DIMM, FSL_DDR_ODT_OTHER_DIMM, @@ -556,7 +556,7 @@ static const struct dynamic_odt dual_DD[4] = { } }; -static const struct dynamic_odt dual_DS[4] = { +static __maybe_unused const struct dynamic_odt dual_DS[4] = { { /* cs0 */ FSL_DDR_ODT_OTHER_DIMM, FSL_DDR_ODT_OTHER_DIMM, @@ -578,7 +578,7 @@ static const struct dynamic_odt dual_DS[4] = { {0, 0, 0, 0} }; -static const struct dynamic_odt dual_SD[4] = { +static __maybe_unused const struct dynamic_odt dual_SD[4] = { { /* cs0 */ FSL_DDR_ODT_OTHER_DIMM, FSL_DDR_ODT_OTHER_DIMM, @@ -600,7 +600,7 @@ static const struct dynamic_odt dual_SD[4] = { } }; -static const struct dynamic_odt dual_SS[4] = { +static __maybe_unused const struct dynamic_odt dual_SS[4] = { { /* cs0 */ FSL_DDR_ODT_OTHER_DIMM, FSL_DDR_ODT_OTHER_DIMM, @@ -617,7 +617,7 @@ static const struct dynamic_odt dual_SS[4] = { {0, 0, 0, 0} }; -static const struct dynamic_odt dual_D0[4] = { +static __maybe_unused const struct dynamic_odt dual_D0[4] = { { /* cs0 */ FSL_DDR_ODT_NEVER, FSL_DDR_ODT_ALL, @@ -634,7 +634,7 @@ static const struct dynamic_odt dual_D0[4] = { {0, 0, 0, 0} }; -static const struct dynamic_odt dual_0D[4] = { +static __maybe_unused const struct dynamic_odt dual_0D[4] = { {0, 0, 0, 0}, {0, 0, 0, 0}, { /* cs2 */ @@ -651,7 +651,7 @@ static const struct dynamic_odt dual_0D[4] = { } }; -static const struct dynamic_odt dual_S0[4] = { +static __maybe_unused const struct dynamic_odt dual_S0[4] = { { /* cs0 */ FSL_DDR_ODT_NEVER, FSL_DDR_ODT_CS, @@ -664,7 +664,7 @@ static const struct dynamic_odt dual_S0[4] = { }; -static const struct dynamic_odt dual_0S[4] = { +static __maybe_unused const struct dynamic_odt dual_0S[4] = { {0, 0, 0, 0}, {0, 0, 0, 0}, { /* cs2 */ @@ -677,7 +677,7 @@ static const struct dynamic_odt dual_0S[4] = { }; -static const struct dynamic_odt odt_unknown[4] = { +static __maybe_unused const struct dynamic_odt odt_unknown[4] = { { /* cs0 */ FSL_DDR_ODT_NEVER, FSL_DDR_ODT_CS, From 4139b170377b357dbbbb86190cc181cce0edc91e Mon Sep 17 00:00:00 2001 From: Sumit Garg Date: Thu, 30 Mar 2017 09:52:38 +0530 Subject: [PATCH 02/24] armv8: ls1043ardb: SPL size reduction Using changes in this patch we were able to reduce approx 10k size of u-boot-spl.bin image. Following is breif description of changes to reduce SPL size: 1. Changes in board/freescale/ls1043ardb/Makefile to remove compilation of eth.c and cpld.c in case of SPL build. 2. Changes in board/freescale/ls1043ardb/ls1043ardb.c to keep only ddr_init and board_early_init_f funcations in case of SPL build. 3. Changes in ls1043a_common.h & ls1043ardb.h to remove driver specific macros due to which static data was being compiled in case of SPL build. 4. Disable MMC driver from bieng compiled in case of SPL NAND build and NAND driver from bieng compiled in case of SPL MMC build. 5. Remove I2C driver support from SPL in case of LS1043ARDB. Signed-off-by: Vinitha Pillai Signed-off-by: Sumit Garg Reviewed-by: York Sun --- board/freescale/ls1043aqds/Makefile | 2 ++ board/freescale/ls1043ardb/Makefile | 4 ++- board/freescale/ls1043ardb/ls1043ardb.c | 18 +++++++----- configs/ls1043ardb_sdcard_defconfig | 1 - include/configs/ls1043a_common.h | 37 +++++++++++++++++++++++++ include/configs/ls1043ardb.h | 14 ++++++++++ 6 files changed, 67 insertions(+), 9 deletions(-) diff --git a/board/freescale/ls1043aqds/Makefile b/board/freescale/ls1043aqds/Makefile index f727bfd622..49d8d7d9b9 100644 --- a/board/freescale/ls1043aqds/Makefile +++ b/board/freescale/ls1043aqds/Makefile @@ -5,5 +5,7 @@ # obj-y += ddr.o +ifndef CONFIG_SPL_BUILD obj-y += eth.o +endif obj-y += ls1043aqds.o diff --git a/board/freescale/ls1043ardb/Makefile b/board/freescale/ls1043ardb/Makefile index 5fe1cc9393..2a4452e5ec 100644 --- a/board/freescale/ls1043ardb/Makefile +++ b/board/freescale/ls1043ardb/Makefile @@ -4,7 +4,9 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-y += cpld.o obj-y += ddr.o obj-y += ls1043ardb.o +ifndef CONFIG_SPL_BUILD obj-$(CONFIG_SYS_DPAA_FMAN) += eth.o +obj-y += cpld.o +endif diff --git a/board/freescale/ls1043ardb/ls1043ardb.c b/board/freescale/ls1043ardb/ls1043ardb.c index 728de2e3f1..9dc1cbc343 100644 --- a/board/freescale/ls1043ardb/ls1043ardb.c +++ b/board/freescale/ls1043ardb/ls1043ardb.c @@ -27,6 +27,15 @@ DECLARE_GLOBAL_DATA_PTR; +int board_early_init_f(void) +{ + fsl_lsch2_early_init_f(); + + return 0; +} + +#ifndef CONFIG_SPL_BUILD + int checkboard(void) { static const char *freq[2] = {"100.00MHZ", "156.25MHZ"}; @@ -65,13 +74,6 @@ int checkboard(void) return 0; } -int board_early_init_f(void) -{ - fsl_lsch2_early_init_f(); - - return 0; -} - int board_init(void) { struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR; @@ -213,3 +215,5 @@ u16 flash_read16(void *addr) return (((val) >> 8) & 0x00ff) | (((val) << 8) & 0xff00); } + +#endif diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig index 02b5b5434a..d34a253f11 100644 --- a/configs/ls1043ardb_sdcard_defconfig +++ b/configs/ls1043ardb_sdcard_defconfig @@ -18,7 +18,6 @@ CONFIG_SPL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0 CONFIG_SPL_ENV_SUPPORT=y -CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_GPT=y diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 46d54a0f0d..23b7ef7b82 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -7,6 +7,25 @@ #ifndef __LS1043A_COMMON_H #define __LS1043A_COMMON_H +/* SPL build */ +#ifdef CONFIG_SPL_BUILD +#define SPL_NO_FMAN +#define SPL_NO_DSPI +#define SPL_NO_PCIE +#define SPL_NO_ENV +#define SPL_NO_MISC +#define SPL_NO_USB +#define SPL_NO_SATA +#define SPL_NO_QE +#define SPL_NO_EEPROM +#endif +#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_BOOT)) +#define SPL_NO_MMC +#endif +#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SD_BOOT)) +#define SPL_NO_IFC +#endif + #define CONFIG_REMAKE_ELF #define CONFIG_FSL_LAYERSCAPE #define CONFIG_LS1043A @@ -83,6 +102,7 @@ #endif /* IFC */ +#ifndef SPL_NO_IFC #if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI) #define CONFIG_FSL_IFC /* @@ -103,6 +123,7 @@ #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ #endif #endif +#endif /* I2C */ #define CONFIG_SYS_I2C @@ -113,6 +134,7 @@ #define CONFIG_SYS_I2C_MXC_I2C4 /* PCIe */ +#ifndef SPL_NO_PCIE #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE3 /* PCIE controller 3 */ @@ -122,17 +144,23 @@ #define CONFIG_PCI_SCAN_SHOW #define CONFIG_CMD_PCI #endif +#endif /* Command line configuration */ +#ifndef SPL_NO_ENV #define CONFIG_CMD_ENV +#endif /* MMC */ +#ifndef SPL_NO_MMC #ifdef CONFIG_MMC #define CONFIG_FSL_ESDHC #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 #endif +#endif /* DSPI */ +#ifndef SPL_NO_DSPI #define CONFIG_FSL_DSPI #ifdef CONFIG_FSL_DSPI #define CONFIG_DM_SPI_FLASH @@ -144,8 +172,10 @@ #define CONFIG_SF_DEFAULT_CS 0 #endif #endif +#endif /* FMan ucode */ +#ifndef SPL_NO_FMAN #define CONFIG_SYS_DPAA_FMAN #ifdef CONFIG_SYS_DPAA_FMAN #define CONFIG_SYS_FM_MURAM_SIZE 0x60000 @@ -177,6 +207,7 @@ #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) #endif +#endif /* Miscellaneous configurable options */ #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000) @@ -184,6 +215,7 @@ #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 +#ifndef SPL_NO_MISC #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) #define MTDPARTS_DEFAULT "mtdparts=spi0.0:1m(uboot)," \ "5m(kernel),1m(dtb),9m(file_system)" @@ -224,6 +256,7 @@ #define CONFIG_BOOTCOMMAND "cp.b $kernel_start $kernel_load " \ "$kernel_size && bootm $kernel_load" #endif +#endif /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ @@ -231,7 +264,11 @@ sizeof(CONFIG_SYS_PROMPT) + 16) #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */ #define CONFIG_SYS_LONGHELP + +#ifndef SPL_NO_MISC #define CONFIG_CMDLINE_EDITING 1 +#endif + #define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_MAXARGS 64 /* max command args */ diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index f185380ae3..ea929d1da0 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -90,7 +90,9 @@ /* * NAND Flash Definitions */ +#ifndef SPL_NO_IFC #define CONFIG_NAND_FSL_IFC +#endif #define CONFIG_SYS_NAND_BASE 0x7e800000 #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE @@ -213,6 +215,7 @@ #define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_CPLD_FTIM3 /* EEPROM */ +#ifndef SPL_NO_EEPROM #define CONFIG_ID_EEPROM #define CONFIG_SYS_I2C_EEPROM_NXID #define CONFIG_SYS_EEPROM_BUS_NUM 0 @@ -220,11 +223,14 @@ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 +#endif /* * Environment */ +#ifndef SPL_NO_ENV #define CONFIG_ENV_OVERWRITE +#endif #if defined(CONFIG_NAND_BOOT) #define CONFIG_ENV_IS_IN_NAND @@ -243,6 +249,7 @@ #endif /* FMan */ +#ifndef SPL_NO_FMAN #ifdef CONFIG_SYS_DPAA_FMAN #define CONFIG_FMAN_ENET #define CONFIG_PHYLIB @@ -266,23 +273,29 @@ #define CONFIG_ETHPRIME "FM1@DTSEC3" #endif +#endif /* QE */ +#ifndef SPL_NO_QE #if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_NAND_BOOT) && \ !defined(CONFIG_QSPI_BOOT) #define CONFIG_U_QE #endif #define CONFIG_SYS_QE_FW_ADDR 0x60600000 +#endif /* USB */ +#ifndef SPL_NO_USB #define CONFIG_HAS_FSL_XHCI_USB #ifdef CONFIG_HAS_FSL_XHCI_USB #define CONFIG_USB_XHCI_FSL #define CONFIG_USB_MAX_CONTROLLER_COUNT 3 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 #endif +#endif /* SATA */ +#ifndef SPL_NO_SATA #define CONFIG_LIBATA #define CONFIG_SCSI_AHCI #define CONFIG_CMD_SCSI @@ -299,6 +312,7 @@ #define SCSI_VEND_ID 0x1b4b #define SCSI_DEV_ID 0x9170 #define CONFIG_SCSI_DEV_LIST {SCSI_VEND_ID, SCSI_DEV_ID} +#endif #include From a52ff334c5b16e71a58fb75f35394761e645f7e9 Mon Sep 17 00:00:00 2001 From: Sumit Garg Date: Thu, 30 Mar 2017 09:53:13 +0530 Subject: [PATCH 03/24] armv8: ls1046ardb: SPL size reduction Using changes in this patch we were able to reduce approx 4k size of u-boot-spl.bin image. Following is breif description of changes to reduce SPL size: 1. Changes in board/freescale/ls1046ardb/Makefile to remove compilation of eth.c and cpld.c in case of SPL build. 2. Changes in board/freescale/ls1046ardb/ls1046ardb.c to keep only ddr_init and board_early_init_f funcations in case of SPL build. 3. Changes in ls1046a_common.h & ls1046ardb.h to remove driver specific macros due to which static data was being compiled in case of SPL build. 4. Disable MMC driver from bieng compiled in case of SPL NAND build and NAND driver from bieng compiled in case of SPL MMC build. Signed-off-by: Vinitha Pillai Signed-off-by: Sumit Garg Reviewed-by: York Sun --- board/freescale/ls1046aqds/Makefile | 2 ++ board/freescale/ls1046ardb/Makefile | 4 +++- board/freescale/ls1046ardb/ls1046ardb.c | 16 +++++++------ include/configs/ls1046a_common.h | 32 +++++++++++++++++++++++++ include/configs/ls1046ardb.h | 15 +++++++++++- 5 files changed, 60 insertions(+), 9 deletions(-) diff --git a/board/freescale/ls1046aqds/Makefile b/board/freescale/ls1046aqds/Makefile index df6e5461db..6267522cc2 100644 --- a/board/freescale/ls1046aqds/Makefile +++ b/board/freescale/ls1046aqds/Makefile @@ -5,5 +5,7 @@ # obj-y += ddr.o +ifndef CONFIG_SPL_BUILD obj-y += eth.o +endif obj-y += ls1046aqds.o diff --git a/board/freescale/ls1046ardb/Makefile b/board/freescale/ls1046ardb/Makefile index 348eb76ea7..b92ed0b3ec 100644 --- a/board/freescale/ls1046ardb/Makefile +++ b/board/freescale/ls1046ardb/Makefile @@ -4,7 +4,9 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-y += cpld.o obj-y += ddr.o obj-y += ls1046ardb.o +ifndef CONFIG_SPL_BUILD obj-$(CONFIG_SYS_DPAA_FMAN) += eth.o +obj-y += cpld.o +endif diff --git a/board/freescale/ls1046ardb/ls1046ardb.c b/board/freescale/ls1046ardb/ls1046ardb.c index 02b6c4c375..0cc508b01e 100644 --- a/board/freescale/ls1046ardb/ls1046ardb.c +++ b/board/freescale/ls1046ardb/ls1046ardb.c @@ -24,6 +24,14 @@ DECLARE_GLOBAL_DATA_PTR; +int board_early_init_f(void) +{ + fsl_lsch2_early_init_f(); + + return 0; +} + +#ifndef CONFIG_SPL_BUILD int checkboard(void) { static const char *freq[2] = {"100.00MHZ", "156.25MHZ"}; @@ -56,13 +64,6 @@ int checkboard(void) return 0; } -int board_early_init_f(void) -{ - fsl_lsch2_early_init_f(); - - return 0; -} - int board_init(void) { struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR; @@ -161,3 +162,4 @@ int ft_board_setup(void *blob, bd_t *bd) return 0; } +#endif diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index cb792961b8..164a5f3884 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -7,6 +7,23 @@ #ifndef __LS1046A_COMMON_H #define __LS1046A_COMMON_H +/* SPL build */ +#ifdef CONFIG_SPL_BUILD +#define SPL_NO_QBMAN +#define SPL_NO_FMAN +#define SPL_NO_ENV +#define SPL_NO_MISC +#define SPL_NO_QSPI +#define SPL_NO_USB +#define SPL_NO_SATA +#endif +#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_BOOT)) +#define SPL_NO_MMC +#endif +#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SD_BOOT)) +#define SPL_NO_IFC +#endif + #define CONFIG_REMAKE_ELF #define CONFIG_FSL_LAYERSCAPE #define CONFIG_MP @@ -110,20 +127,28 @@ #define CONFIG_SYS_I2C_MXC_I2C4 /* Command line configuration */ +#ifndef SPL_NO_ENV #define CONFIG_CMD_ENV +#endif /* MMC */ +#ifndef SPL_NO_MMC #ifdef CONFIG_MMC #define CONFIG_FSL_ESDHC #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 #endif +#endif +#ifndef SPL_NO_QBMAN #define CONFIG_SYS_DPAA_QBMAN /* Support Q/Bman */ +#endif /* FMan ucode */ +#ifndef SPL_NO_FMAN #define CONFIG_SYS_DPAA_FMAN #ifdef CONFIG_SYS_DPAA_FMAN #define CONFIG_SYS_FM_MURAM_SIZE 0x60000 +#endif #ifdef CONFIG_SD_BOOT /* @@ -157,6 +182,7 @@ #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 +#ifndef SPL_NO_MISC /* Initial environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ "hwconfig=fsl_ddr:bank_intlv=auto\0" \ @@ -174,13 +200,19 @@ #define CONFIG_BOOTARGS "console=ttyS0,115200 root=/dev/ram0 " \ "earlycon=uart8250,mmio,0x21c0500 " \ MTDPARTS_DEFAULT +#endif + /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */ #define CONFIG_SYS_LONGHELP + +#ifndef SPL_NO_MISC #define CONFIG_CMDLINE_EDITING 1 +#endif + #define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_MAXARGS 64 /* max command args */ diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index 2141b8299a..e368072c28 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h @@ -51,13 +51,14 @@ #endif #endif +#ifndef SPL_NO_IFC /* IFC */ #define CONFIG_FSL_IFC - /* * NAND Flash Definitions */ #define CONFIG_NAND_FSL_IFC +#endif #define CONFIG_SYS_NAND_BASE 0x7e800000 #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE @@ -161,7 +162,9 @@ /* * Environment */ +#ifndef SPL_NO_ENV #define CONFIG_ENV_OVERWRITE +#endif #if defined(CONFIG_SD_BOOT) #define CONFIG_ENV_IS_IN_MMC @@ -176,6 +179,7 @@ #endif /* FMan */ +#ifndef SPL_NO_FMAN #ifdef CONFIG_SYS_DPAA_FMAN #define CONFIG_FMAN_ENET #define CONFIG_PHYLIB @@ -196,16 +200,20 @@ #define CONFIG_ETHPRIME "FM1@DTSEC3" #endif +#endif /* QSPI device */ +#ifndef SPL_NO_QSPI #ifdef CONFIG_FSL_QSPI #define CONFIG_SPI_FLASH_SPANSION #define FSL_QSPI_FLASH_SIZE (1 << 26) #define FSL_QSPI_FLASH_NUM 2 #define CONFIG_SPI_FLASH_BAR #endif +#endif /* USB */ +#ifndef SPL_NO_USB #define CONFIG_HAS_FSL_XHCI_USB #ifdef CONFIG_HAS_FSL_XHCI_USB #define CONFIG_USB_XHCI_HCD @@ -216,8 +224,10 @@ #define CONFIG_CMD_USB #define CONFIG_USB_STORAGE #endif +#endif /* SATA */ +#ifndef SPL_NO_SATA #define CONFIG_LIBATA #define CONFIG_SCSI_AHCI #define CONFIG_SCSI_AHCI_PLAT @@ -229,7 +239,9 @@ #define CONFIG_SYS_SCSI_MAX_LUN 1 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ CONFIG_SYS_SCSI_MAX_LUN) +#endif +#ifndef SPL_NO_MISC #define CONFIG_BOOTCOMMAND "sf probe 0:0;sf read $kernel_load" \ "$kernel_start $kernel_size;" \ "bootm $kernel_load" @@ -238,5 +250,6 @@ "15m(u-boot),48m(kernel.itb);" \ "7e800000.flash:16m(nand_uboot)," \ "48m(nand_kernel),448m(nand_free)" +#endif #endif /* __LS1046ARDB_H__ */ From 0645c23a7cb29b8fddd517be9b585b56a629e744 Mon Sep 17 00:00:00 2001 From: VINITHA PILLAI Date: Fri, 31 Mar 2017 10:50:02 +0530 Subject: [PATCH 04/24] powerpc: T1042RDB: SECURE BOOT: Remove CONFIG_CMD_BLOB from SPL compilation BLOB feature is not required during SPL compilation. Signed-off-by: Vinitha Pillai Signed-off-by: Sumit Garg Reviewed-by: York Sun --- arch/powerpc/include/asm/fsl_secure_boot.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h b/arch/powerpc/include/asm/fsl_secure_boot.h index 1b7cf0996b..2b5a2913ec 100644 --- a/arch/powerpc/include/asm/fsl_secure_boot.h +++ b/arch/powerpc/include/asm/fsl_secure_boot.h @@ -100,11 +100,11 @@ #endif /* ifdef CONFIG_SPL_BUILD */ #define CONFIG_CMD_ESBC_VALIDATE -#define CONFIG_CMD_BLOB #define CONFIG_FSL_SEC_MON #define CONFIG_SHA_PROG_HW_ACCEL #ifndef CONFIG_SPL_BUILD +#define CONFIG_CMD_BLOB /* * fsl_setenv_chain_of_trust() must be called from * board_late_init() From d1a795ace90b9e2fee8f9db10489886310264336 Mon Sep 17 00:00:00 2001 From: Vinitha Pillai-B57223 Date: Thu, 23 Mar 2017 13:48:14 +0530 Subject: [PATCH 05/24] armv8: fsl-layerscape: SECURE BOOT: Add header address of PPA in kconfig The header address of PPA defined in Kconfig. Signed-off-by: Vinitha Pillai Signed-off-by: Sumit Garg Reviewed-by: York Sun --- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 12 ++++++++++++ arch/arm/cpu/armv8/fsl-layerscape/ppa.c | 2 +- arch/arm/include/asm/fsl_secure_boot.h | 14 ++------------ 3 files changed, 15 insertions(+), 13 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index b24462bede..d587ed3c93 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -171,6 +171,18 @@ config SYS_LS_PPA_FW_ADDR QSPI flash, this address is a directly memory-mapped. If it is in a serial accessed flash, such as NAND and SD card, it is a byte offset. + +config SYS_LS_PPA_ESBC_ADDR + hex "hdr address of PPA firmware loading from" + depends on FSL_LS_PPA && CHAIN_OF_TRUST + default 0x600c0000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1043A + default 0x580c40000 if SYS_LS_PPA_FW_IN_XIP && FSL_LSCH3 + help + If the PPA header firmware locate at XIP flash, such as NOR or + QSPI flash, this address is a directly memory-mapped. + If it is in a serial accessed flash, such as NAND and SD + card, it is a byte offset. + endmenu config SYS_FSL_ERRATUM_A010315 diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ppa.c b/arch/arm/cpu/armv8/fsl-layerscape/ppa.c index b35ad5fb6f..7f87bb8689 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/ppa.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/ppa.c @@ -178,7 +178,7 @@ int ppa_init(void) ppa_img_addr = (uintptr_t)ppa_fit_addr; if (fsl_check_boot_mode_secure() != 0) { ret = fsl_secboot_validate(ppa_esbc_hdr, - CONFIG_PPA_KEY_HASH, + PPA_KEY_HASH, &ppa_img_addr); if (ret != 0) printf("PPA validation failed\n"); diff --git a/arch/arm/include/asm/fsl_secure_boot.h b/arch/arm/include/asm/fsl_secure_boot.h index d98a1e8f89..4c36f9dc5e 100644 --- a/arch/arm/include/asm/fsl_secure_boot.h +++ b/arch/arm/include/asm/fsl_secure_boot.h @@ -109,23 +109,13 @@ #endif #ifdef CONFIG_FSL_LS_PPA -#ifdef CONFIG_SYS_LS_PPA_FW_IN_XIP -#ifdef CONFIG_LS1043A -#define CONFIG_SYS_LS_PPA_ESBC_ADDR 0x600c0000 -#elif defined(CONFIG_FSL_LSCH3) -#define CONFIG_SYS_LS_PPA_ESBC_ADDR 0x580c40000 -#endif -#else -#error "No CONFIG_SYS_LS_PPA_FW_IN_xxx defined" -#endif /* ifdef CONFIG_SYS_LS_PPA_FW_IN_XIP */ - /* Define the key hash here if SRK used for signing PPA image is * different from SRK hash put in SFP used for U-Boot. * Example - * #define CONFIG_PPA_KEY_HASH \ + * #define PPA_KEY_HASH \ * "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b" */ -#define CONFIG_PPA_KEY_HASH NULL +#define PPA_KEY_HASH NULL #endif /* ifdef CONFIG_FSL_LS_PPA */ #include From 216c1e048f3cd20c0c85c07e0cce31695ab19940 Mon Sep 17 00:00:00 2001 From: Vinitha Pillai-B57223 Date: Thu, 23 Mar 2017 13:48:15 +0530 Subject: [PATCH 06/24] armv8: LS1043ARDB: Enable PPA in Secure boot defconfig Enable PPA in secure boot by defining FSL_LS_PPA macro in its defconfig file. Signed-off-by: Vinitha Pillai Signed-off-by: Sumit Garg Reviewed-by: York Sun --- configs/ls1043ardb_SECURE_BOOT_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig index 6f86877e7e..861d49bb02 100644 --- a/configs/ls1043ardb_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_SECURE_BOOT_defconfig @@ -3,6 +3,7 @@ CONFIG_TARGET_LS1043ARDB=y CONFIG_SECURE_BOOT=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_FIT=y +CONFIG_FSL_LS_PPA=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=10 From b3635f57d94c366bd94f9f8010024cd6a2d6b272 Mon Sep 17 00:00:00 2001 From: Vinitha Pillai-B57223 Date: Thu, 23 Mar 2017 13:48:16 +0530 Subject: [PATCH 07/24] armv8: SECURE_BOOT: Enable chain of trust on LS1046A platform Define bootscript and its header addresses for QSPI target. Also define PPA header address to enable PPA validation. Signed-off-by: Vinitha Pillai Signed-off-by: Sumit Garg --- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 1 + .../include/asm/arch-fsl-layerscape/config.h | 2 +- arch/arm/include/asm/fsl_secure_boot.h | 18 ++++++++++++++---- 3 files changed, 16 insertions(+), 5 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index d587ed3c93..f19c1be85a 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -176,6 +176,7 @@ config SYS_LS_PPA_ESBC_ADDR hex "hdr address of PPA firmware loading from" depends on FSL_LS_PPA && CHAIN_OF_TRUST default 0x600c0000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1043A + default 0x40740000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1046A default 0x580c40000 if SYS_LS_PPA_FW_IN_XIP && FSL_LSCH3 help If the PPA header firmware locate at XIP flash, such as NOR or diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index b5b08aae23..1f22afd9e6 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -199,7 +199,7 @@ #define CONFIG_SYS_FSL_IFC_BE #define CONFIG_SYS_FSL_SFP_VER_3_2 -#define CONFIG_SYS_FSL_SNVS_LE +#define CONFIG_SYS_FSL_SEC_MON_BE #define CONFIG_SYS_FSL_SFP_BE #define CONFIG_SYS_FSL_SRK_LE #define CONFIG_KEY_REVOCATION diff --git a/arch/arm/include/asm/fsl_secure_boot.h b/arch/arm/include/asm/fsl_secure_boot.h index 4c36f9dc5e..cbf92fbb7b 100644 --- a/arch/arm/include/asm/fsl_secure_boot.h +++ b/arch/arm/include/asm/fsl_secure_boot.h @@ -46,9 +46,10 @@ #endif -#if defined(CONFIG_LS1043A) || defined(CONFIG_LS2080A) -/* For LS1043 (ARMv8), ESBC image Address in Header is 64 bit - * Similiarly for LS2080 +#if defined(CONFIG_FSL_LAYERSCAPE) +/* + * For fsl layerscape based platforms, ESBC image Address in Header + * is 64 bit. */ #define CONFIG_ESBC_ADDR_64BIT #endif @@ -90,12 +91,21 @@ #define CONFIG_BS_ADDR_DEVICE 0x00000940 #define CONFIG_BS_HDR_SIZE 0x00000010 #define CONFIG_BS_SIZE 0x00000008 +#elif defined(CONFIG_QSPI_BOOT) +#ifdef CONFIG_ARCH_LS1046A +#define CONFIG_BS_HDR_ADDR_DEVICE 0x40780000 +#define CONFIG_BS_ADDR_DEVICE 0x40800000 #else +#error "Platform not supported" +#endif +#define CONFIG_BS_HDR_SIZE 0x00002000 +#define CONFIG_BS_SIZE 0x00001000 +#else /* Default NOR Boot */ #define CONFIG_BS_HDR_ADDR_DEVICE 0x600a0000 #define CONFIG_BS_ADDR_DEVICE 0x60060000 #define CONFIG_BS_HDR_SIZE 0x00002000 #define CONFIG_BS_SIZE 0x00001000 -#endif /* #ifdef CONFIG_SD_BOOT */ +#endif #define CONFIG_BS_HDR_ADDR_RAM 0x81000000 #define CONFIG_BS_ADDR_RAM 0x81020000 #endif From b7c19ea1ca7d3a02b8aa1e0f756ca60951fa367e Mon Sep 17 00:00:00 2001 From: Sumit Garg Date: Thu, 23 Mar 2017 13:48:17 +0530 Subject: [PATCH 08/24] armv8: LS1046AQDS: Add NOR Secure Boot Target Add NOR secure boot target. Also enable sec init. Signed-off-by: Vinitha Pillai Signed-off-by: Sumit Garg Reviewed-by: York Sun --- board/freescale/ls1046aqds/MAINTAINERS | 4 +++ board/freescale/ls1046aqds/ls1046aqds.c | 19 ++++++++++++ configs/ls1046aqds_SECURE_BOOT_defconfig | 39 ++++++++++++++++++++++++ 3 files changed, 62 insertions(+) create mode 100644 configs/ls1046aqds_SECURE_BOOT_defconfig diff --git a/board/freescale/ls1046aqds/MAINTAINERS b/board/freescale/ls1046aqds/MAINTAINERS index b4549ae138..6737d558ce 100644 --- a/board/freescale/ls1046aqds/MAINTAINERS +++ b/board/freescale/ls1046aqds/MAINTAINERS @@ -8,3 +8,7 @@ F: configs/ls1046aqds_nand_defconfig F: configs/ls1046aqds_sdcard_ifc_defconfig F: configs/ls1046aqds_sdcard_qspi_defconfig F: configs/ls1046aqds_qspi_defconfig + +M: Sumit Garg +S: Maintained +F: configs/ls1046aqds_SECURE_BOOT_defconfig diff --git a/board/freescale/ls1046aqds/ls1046aqds.c b/board/freescale/ls1046aqds/ls1046aqds.c index 69fc15b681..58ce75acf6 100644 --- a/board/freescale/ls1046aqds/ls1046aqds.c +++ b/board/freescale/ls1046aqds/ls1046aqds.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include "../common/vid.h" @@ -266,6 +267,24 @@ int board_init(void) if (adjust_vdd(0)) printf("Warning: Adjusting core voltage failed.\n"); +#ifdef CONFIG_SECURE_BOOT + /* + * In case of Secure Boot, the IBR configures the SMMU + * to allow only Secure transactions. + * SMMU must be reset in bypass mode. + * Set the ClientPD bit and Clear the USFCFG Bit + */ + u32 val; + val = (in_le32(SMMU_SCR0) | SCR0_CLIENTPD_MASK) & ~(SCR0_USFCFG_MASK); + out_le32(SMMU_SCR0, val); + val = (in_le32(SMMU_NSCR0) | SCR0_CLIENTPD_MASK) & ~(SCR0_USFCFG_MASK); + out_le32(SMMU_NSCR0, val); +#endif + +#ifdef CONFIG_FSL_CAAM + sec_init(); +#endif + return 0; } diff --git a/configs/ls1046aqds_SECURE_BOOT_defconfig b/configs/ls1046aqds_SECURE_BOOT_defconfig new file mode 100644 index 0000000000..dc16fa0b8f --- /dev/null +++ b/configs/ls1046aqds_SECURE_BOOT_defconfig @@ -0,0 +1,39 @@ +CONFIG_ARM=y +CONFIG_TARGET_LS1046AQDS=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_SECURE_BOOT=y +CONFIG_BOOTDELAY=10 +CONFIG_HUSH_PARSER=y +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_GREPENV=y +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_MEMINFO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_I2C=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_FAT=y +CONFIG_OF_CONTROL=y +CONFIG_DM=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_NETDEVICES=y +CONFIG_E1000=y +CONFIG_PCI=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_LAYERSCAPE=y +CONFIG_SYS_NS16550=y +CONFIG_DM_SPI=y +CONFIG_FSL_DSPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_RSA=y From f7244f2c4815aa80a7cd7e9ceaee1969a16acd47 Mon Sep 17 00:00:00 2001 From: Vinitha Pillai-B57223 Date: Thu, 23 Mar 2017 13:48:18 +0530 Subject: [PATCH 09/24] armv8: LS1046ARDB: Add QSPI Secure Boot target Add QSPI Secure Boot target. Also enable sec init. Signed-off-by: Vinitha Pillai Signed-off-by: Sumit Garg Reviewed-by: York Sun --- board/freescale/ls1046ardb/Kconfig | 2 +- board/freescale/ls1046ardb/MAINTAINERS | 4 ++ board/freescale/ls1046ardb/ls1046ardb.c | 19 ++++++++++ configs/ls1046ardb_qspi_SECURE_BOOT_defconfig | 37 +++++++++++++++++++ include/configs/ls1046ardb.h | 2 + 5 files changed, 63 insertions(+), 1 deletion(-) create mode 100644 configs/ls1046ardb_qspi_SECURE_BOOT_defconfig diff --git a/board/freescale/ls1046ardb/Kconfig b/board/freescale/ls1046ardb/Kconfig index a62255c78d..b9f2ed7e4b 100644 --- a/board/freescale/ls1046ardb/Kconfig +++ b/board/freescale/ls1046ardb/Kconfig @@ -12,5 +12,5 @@ config SYS_SOC config SYS_CONFIG_NAME default "ls1046ardb" - +source "board/freescale/common/Kconfig" endif diff --git a/board/freescale/ls1046ardb/MAINTAINERS b/board/freescale/ls1046ardb/MAINTAINERS index ff42bef090..758ff9d572 100644 --- a/board/freescale/ls1046ardb/MAINTAINERS +++ b/board/freescale/ls1046ardb/MAINTAINERS @@ -7,3 +7,7 @@ F: include/configs/ls1046ardb.h F: configs/ls1046ardb_qspi_defconfig F: configs/ls1046ardb_sdcard_defconfig F: configs/ls1046ardb_emmc_defconfig + +M: Sumit Garg +S: Maintained +F: configs/ls1046ardb_qspi_SECURE_BOOT_defconfig diff --git a/board/freescale/ls1046ardb/ls1046ardb.c b/board/freescale/ls1046ardb/ls1046ardb.c index 0cc508b01e..1dd5e69882 100644 --- a/board/freescale/ls1046ardb/ls1046ardb.c +++ b/board/freescale/ls1046ardb/ls1046ardb.c @@ -21,6 +21,7 @@ #include #include #include "cpld.h" +#include DECLARE_GLOBAL_DATA_PTR; @@ -72,6 +73,24 @@ int board_init(void) enable_layerscape_ns_access(); #endif +#ifdef CONFIG_SECURE_BOOT + /* + * In case of Secure Boot, the IBR configures the SMMU + * to allow only Secure transactions. + * SMMU must be reset in bypass mode. + * Set the ClientPD bit and Clear the USFCFG Bit + */ + u32 val; + val = (in_le32(SMMU_SCR0) | SCR0_CLIENTPD_MASK) & ~(SCR0_USFCFG_MASK); + out_le32(SMMU_SCR0, val); + val = (in_le32(SMMU_NSCR0) | SCR0_CLIENTPD_MASK) & ~(SCR0_USFCFG_MASK); + out_le32(SMMU_NSCR0, val); +#endif + +#ifdef CONFIG_FSL_CAAM + sec_init(); +#endif + #ifdef CONFIG_FSL_LS_PPA ppa_init(); #endif diff --git a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig new file mode 100644 index 0000000000..af14e19467 --- /dev/null +++ b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig @@ -0,0 +1,37 @@ +CONFIG_ARM=y +CONFIG_TARGET_LS1046ARDB=y +CONFIG_FSL_LS_PPA=y +CONFIG_QSPI_AHB_INIT=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" +CONFIG_FIT_VERBOSE=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_QSPI_BOOT=y +CONFIG_SECURE_BOOT=y +CONFIG_BOOTDELAY=10 +CONFIG_HUSH_PARSER=y +# CONFIG_CMD_IMLS is not set +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_I2C=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_FAT=y +CONFIG_OF_CONTROL=y +CONFIG_DM=y +CONFIG_SPI_FLASH=y +CONFIG_NETDEVICES=y +CONFIG_E1000=y +CONFIG_PCI=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_LAYERSCAPE=y +CONFIG_SYS_NS16550=y +CONFIG_DM_SPI=y +CONFIG_FSL_QSPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_RSA=y diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index e368072c28..67ee62608c 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h @@ -252,4 +252,6 @@ "48m(nand_kernel),448m(nand_free)" #endif +#include + #endif /* __LS1046ARDB_H__ */ From d2a99502ade1a85dd75a1709ea5808bc5e7ee21f Mon Sep 17 00:00:00 2001 From: Vinitha Pillai-B57223 Date: Thu, 23 Mar 2017 13:48:19 +0530 Subject: [PATCH 10/24] armv8: SECURE_BOOT: Enable chain of trust on LS1012A platform Define bootscript and its header addresses for QSPI target Also add PPA header address in Kconfig Signed-off-by: Vinitha Pillai Signed-off-by: Sumit Garg Reviewed-by: York Sun --- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 1 + arch/arm/include/asm/arch-fsl-layerscape/config.h | 7 ++++++- arch/arm/include/asm/fsl_secure_boot.h | 3 +++ 3 files changed, 10 insertions(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index f19c1be85a..9fb76f00ed 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -177,6 +177,7 @@ config SYS_LS_PPA_ESBC_ADDR depends on FSL_LS_PPA && CHAIN_OF_TRUST default 0x600c0000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1043A default 0x40740000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1046A + default 0x40480000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1012A default 0x580c40000 if SYS_LS_PPA_FW_IN_XIP && FSL_LSCH3 help If the PPA header firmware locate at XIP flash, such as NOR or diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index 1f22afd9e6..4db11b646e 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -185,7 +185,12 @@ #elif defined(CONFIG_ARCH_LS1012A) #define GICD_BASE 0x01401000 #define GICC_BASE 0x01402000 - +#define CONFIG_SYS_FSL_SFP_VER_3_2 +#define CONFIG_SYS_FSL_SEC_MON_BE +#define CONFIG_SYS_FSL_SFP_BE +#define CONFIG_SYS_FSL_SRK_LE +#define CONFIG_KEY_REVOCATION +#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1 #define CONFIG_SYS_DDR_BLOCK1_SIZE ((phys_size_t)2 << 30) #define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_DDR_BLOCK1_SIZE diff --git a/arch/arm/include/asm/fsl_secure_boot.h b/arch/arm/include/asm/fsl_secure_boot.h index cbf92fbb7b..558dc62cc7 100644 --- a/arch/arm/include/asm/fsl_secure_boot.h +++ b/arch/arm/include/asm/fsl_secure_boot.h @@ -95,6 +95,9 @@ #ifdef CONFIG_ARCH_LS1046A #define CONFIG_BS_HDR_ADDR_DEVICE 0x40780000 #define CONFIG_BS_ADDR_DEVICE 0x40800000 +#elif defined(CONFIG_ARCH_LS1012A) +#define CONFIG_BS_HDR_ADDR_DEVICE 0x400c0000 +#define CONFIG_BS_ADDR_DEVICE 0x40060000 #else #error "Platform not supported" #endif From 11d14bfb756331bc26ee6ea118f9c1bd8aa0fc65 Mon Sep 17 00:00:00 2001 From: Vinitha Pillai-B57223 Date: Thu, 23 Mar 2017 13:48:20 +0530 Subject: [PATCH 11/24] armv8: LS1012ARDB: Add QSPI Secure Boot target Add QSPI Secure Boot target to enable chain of trust Signed-off-by: Sumit Garg Signed-off-by: Vinitha Pillai Reviewed-by: Ruchika Gupta Reviewed-by: York Sun --- board/freescale/ls1012ardb/MAINTAINERS | 4 ++ board/freescale/ls1012ardb/ls1012ardb.c | 5 ++ configs/ls1012ardb_qspi_SECURE_BOOT_defconfig | 48 +++++++++++++++++++ include/configs/ls1012a_common.h | 2 - include/configs/ls1012ardb.h | 3 ++ 5 files changed, 60 insertions(+), 2 deletions(-) create mode 100644 configs/ls1012ardb_qspi_SECURE_BOOT_defconfig diff --git a/board/freescale/ls1012ardb/MAINTAINERS b/board/freescale/ls1012ardb/MAINTAINERS index 79a2a7dd24..2cb38e7405 100644 --- a/board/freescale/ls1012ardb/MAINTAINERS +++ b/board/freescale/ls1012ardb/MAINTAINERS @@ -4,3 +4,7 @@ S: Maintained F: board/freescale/ls1012ardb/ F: include/configs/ls1012ardb.h F: configs/ls1012ardb_qspi_defconfig + +M: Sumit Garg +S: Maintained +F: configs/ls1012ardb_qspi_SECURE_BOOT_defconfig diff --git a/board/freescale/ls1012ardb/ls1012ardb.c b/board/freescale/ls1012ardb/ls1012ardb.c index a23a23be1f..a21e4c4aeb 100644 --- a/board/freescale/ls1012ardb/ls1012ardb.c +++ b/board/freescale/ls1012ardb/ls1012ardb.c @@ -22,6 +22,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -118,6 +119,10 @@ int board_init(void) gd->env_addr = (ulong)&default_environment[0]; #endif +#ifdef CONFIG_FSL_CAAM + sec_init(); +#endif + #ifdef CONFIG_FSL_LS_PPA ppa_init(); #endif diff --git a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig new file mode 100644 index 0000000000..97f49d5bd5 --- /dev/null +++ b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig @@ -0,0 +1,48 @@ +CONFIG_ARM=y +CONFIG_TARGET_LS1012ARDB=y +CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT" +# CONFIG_CMD_IMLS is not set +CONFIG_SYS_NS16550=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb" +CONFIG_FSL_LS_PPA=y +CONFIG_OF_CONTROL=y +CONFIG_DM=y +CONFIG_SPI_FLASH=y +# CONFIG_SYS_MALLOC_F is not set +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_SECURE_BOOT=y +CONFIG_QSPI_BOOT=y +CONFIG_BOOTDELAY=10 +CONFIG_HUSH_PARSER=y +CONFIG_CMD_GREPENV=y +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_I2C=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_FAT=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DM_SPI_FLASH=y +CONFIG_NETDEVICES=y +CONFIG_E1000=y +CONFIG_PCI=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_LAYERSCAPE=y +CONFIG_DM_SPI=y +CONFIG_FSL_DSPI=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_STORAGE=y +CONFIG_RSA=y +CONFIG_RSA_SOFTWARE_EXP=y diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 1a0c7f8e5f..09f890d55c 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -123,6 +123,4 @@ #define CONFIG_PANIC_HANG #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ -#include - #endif /* __LS1012A_COMMON_H */ diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h index 70d3a71eb3..276fe1050c 100644 --- a/include/configs/ls1012ardb.h +++ b/include/configs/ls1012ardb.h @@ -74,4 +74,7 @@ #define CONFIG_SYS_MEMTEST_START 0x80000000 #define CONFIG_SYS_MEMTEST_END 0x9fffffff + +#include + #endif /* __LS1012ARDB_H__ */ From 70f9661ca9130c446c146f582046024eddaaee31 Mon Sep 17 00:00:00 2001 From: Ruchika Gupta Date: Mon, 17 Apr 2017 18:07:17 +0530 Subject: [PATCH 12/24] arm: ls1043ardb: Add SD secure boot target - Add SD secure boot target for ls1043ardb. - Implement FSL_LSCH2 specific spl_board_init() to setup CAAM stream ID and corresponding stream ID in SMMU. - Change the u-boot size defined by a macro for copying the main U-Boot by SPL to also include the u-boot Secure Boot header size as header is appended to u-boot image. So header will also be copied from SD to DDR. - CONFIG_MAX_SPL_SIZE is limited to 90KB. SPL is copied to OCRAM (128K) where 32K are reserved for use by boot ROM and 6K for secure boto header. - Error messages during SPL boot are limited to error code numbers instead of strings to reduce the size of SPL image. Signed-off-by: Vinitha Pillai-B57223 Signed-off-by: Sumit Garg Signed-off-by: Ruchika Gupta Reviewed-by: York Sun --- arch/arm/cpu/armv8/fsl-layerscape/spl.c | 18 ++++++ arch/arm/include/asm/fsl_secure_boot.h | 9 ++- board/freescale/common/fsl_validate.c | 4 ++ board/freescale/ls1043ardb/MAINTAINERS | 1 + .../ls1043ardb_sdcard_SECURE_BOOT_defconfig | 57 +++++++++++++++++++ include/configs/ls1043a_common.h | 16 +++++- 6 files changed, 101 insertions(+), 4 deletions(-) create mode 100644 configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c b/arch/arm/cpu/armv8/fsl-layerscape/spl.c index 73a8680741..dfacf98e88 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c @@ -41,6 +41,24 @@ u32 spl_boot_mode(const u32 boot_device) } #ifdef CONFIG_SPL_BUILD + +void spl_board_init(void) +{ +#if defined(CONFIG_SECURE_BOOT) && defined(CONFIG_FSL_LSCH2) + /* + * In case of Secure Boot, the IBR configures the SMMU + * to allow only Secure transactions. + * SMMU must be reset in bypass mode. + * Set the ClientPD bit and Clear the USFCFG Bit + */ + u32 val; + val = (in_le32(SMMU_SCR0) | SCR0_CLIENTPD_MASK) & ~(SCR0_USFCFG_MASK); + out_le32(SMMU_SCR0, val); + val = (in_le32(SMMU_NSCR0) | SCR0_CLIENTPD_MASK) & ~(SCR0_USFCFG_MASK); + out_le32(SMMU_NSCR0, val); +#endif +} + void board_init_f(ulong dummy) { /* Clear global data */ diff --git a/arch/arm/include/asm/fsl_secure_boot.h b/arch/arm/include/asm/fsl_secure_boot.h index 558dc62cc7..1ca5f42ed6 100644 --- a/arch/arm/include/asm/fsl_secure_boot.h +++ b/arch/arm/include/asm/fsl_secure_boot.h @@ -27,10 +27,11 @@ #define CONFIG_SPL_UBOOT_KEY_HASH NULL #endif /* ifdef CONFIG_SPL_BUILD */ +#define CONFIG_KEY_REVOCATION + #ifndef CONFIG_SPL_BUILD #define CONFIG_CMD_BLOB #define CONFIG_CMD_HASH -#define CONFIG_KEY_REVOCATION #ifndef CONFIG_SYS_RAMBOOT /* The key used for verification of next level images * is picked up from an Extension Table which has @@ -87,7 +88,11 @@ /* For SD boot address and size are assigned in terms of sector * offset and no. of sectors respectively. */ -#define CONFIG_BS_HDR_ADDR_DEVICE 0x00000900 +#if defined(CONFIG_LS1043A) +#define CONFIG_BS_HDR_ADDR_DEVICE 0x00000920 +#else +#define CONFIG_BS_HDR_ADDR_DEVICE 0x00000900 +#endif #define CONFIG_BS_ADDR_DEVICE 0x00000940 #define CONFIG_BS_HDR_SIZE 0x00000010 #define CONFIG_BS_SIZE 0x00000008 diff --git a/board/freescale/common/fsl_validate.c b/board/freescale/common/fsl_validate.c index 7396aa2f69..125655a37a 100644 --- a/board/freescale/common/fsl_validate.c +++ b/board/freescale/common/fsl_validate.c @@ -393,6 +393,7 @@ static void fsl_secboot_bootscript_parse_failure(void) */ void fsl_secboot_handle_error(int error) { +#ifndef CONFIG_SPL_BUILD const struct fsl_secboot_errcode *e; for (e = fsl_secboot_errcodes; e->errcode != ERROR_ESBC_CLIENT_MAX; @@ -400,6 +401,9 @@ void fsl_secboot_handle_error(int error) if (e->errcode == error) printf("ERROR :: %x :: %s\n", error, e->name); } +#else + printf("ERROR :: %x\n", error); +#endif /* If Boot Mode is secure, transition the SNVS state and issue * reset based on type of failure and ITS setting. diff --git a/board/freescale/ls1043ardb/MAINTAINERS b/board/freescale/ls1043ardb/MAINTAINERS index 0503a3fcc9..8b69892bbb 100644 --- a/board/freescale/ls1043ardb/MAINTAINERS +++ b/board/freescale/ls1043ardb/MAINTAINERS @@ -12,3 +12,4 @@ LS1043A_SECURE_BOOT BOARD M: Ruchika Gupta S: Maintained F: configs/ls1043ardb_SECURE_BOOT_defconfig +F: configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig new file mode 100644 index 0000000000..3f35d6493f --- /dev/null +++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig @@ -0,0 +1,57 @@ +CONFIG_ARM=y +CONFIG_TARGET_LS1043ARDB=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SPL_MMC_SUPPORT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT" +CONFIG_SECURE_BOOT=y +CONFIG_SD_BOOT=y +CONFIG_BOOTDELAY=10 +CONFIG_SPL=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 +CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_I2C=y +CONFIG_CMD_USB=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_PXE=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_FAT=y +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_OF_CONTROL=y +CONFIG_DM=y +CONFIG_SPL_DM=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_NETDEVICES=y +CONFIG_E1000=y +CONFIG_PCI=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_LAYERSCAPE=y +CONFIG_SYS_NS16550=y +CONFIG_DM_SPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_STORAGE=y +CONFIG_RSA=y +CONFIG_SPL_RSA=y +CONFIG_SPL_CRYPTO_SUPPORT=y +CONFIG_SPL_HASH_SUPPORT=y diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 23b7ef7b82..c63c5e3403 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -71,7 +71,7 @@ #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_TEXT_BASE 0x10000000 -#define CONFIG_SPL_MAX_SIZE 0x1d000 +#define CONFIG_SPL_MAX_SIZE 0x17000 #define CONFIG_SPL_STACK 0x1001e000 #define CONFIG_SPL_PAD_TO 0x1d000 @@ -80,7 +80,19 @@ #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 #define CONFIG_SPL_BSS_START_ADDR 0x80100000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 -#define CONFIG_SYS_MONITOR_LEN 0xa0000 + +#ifdef CONFIG_SECURE_BOOT +#define CONFIG_U_BOOT_HDR_SIZE (16 << 10) +/* + * HDR would be appended at end of image and copied to DDR along + * with U-Boot image. Here u-boot max. size is 512K. So if binary + * size increases then increase this size in case of secure boot as + * it uses raw u-boot image instead of fit image. + */ +#define CONFIG_SYS_MONITOR_LEN (0x100000 + CONFIG_U_BOOT_HDR_SIZE) +#else +#define CONFIG_SYS_MONITOR_LEN 0x100000 +#endif /* ifdef CONFIG_SECURE_BOOT */ #endif /* NAND SPL */ From 762f92a60e1f02c2597500766f86e4e3fb145b21 Mon Sep 17 00:00:00 2001 From: Ruchika Gupta Date: Mon, 17 Apr 2017 18:07:18 +0530 Subject: [PATCH 13/24] arm: ls1043ardb: Add NAND secure boot target Add NAND secure boot target for ls1043ardb. - Change the u-boot size defined by a macro for copying the main U-Boot by SPL to also include the u-boot Secure Boot header size as header is appended to u-boot image. So header will also be copied from SD to DDR. - MACRO for CONFIG_BOOTSCRIPT_COPY_RAM is enabled to copy Bootscript from NAND to DDR. Offsets for Bootscript on NAND and DDR have been also defined. Signed-off-by: Vinitha Pillai Signed-off-by: Sumit Garg Signed-off-by: Ruchika Gupta Reviewed-by: York Sun --- arch/arm/include/asm/fsl_secure_boot.h | 7 ++- board/freescale/ls1043ardb/MAINTAINERS | 1 + configs/ls1043ardb_nand_SECURE_BOOT_defconfig | 57 +++++++++++++++++++ include/config_fsl_chain_trust.h | 9 +-- include/configs/ls1043a_common.h | 18 +++++- include/configs/ls1043ardb.h | 2 +- 6 files changed, 87 insertions(+), 7 deletions(-) create mode 100644 configs/ls1043ardb_nand_SECURE_BOOT_defconfig diff --git a/arch/arm/include/asm/fsl_secure_boot.h b/arch/arm/include/asm/fsl_secure_boot.h index 1ca5f42ed6..1fd09f205a 100644 --- a/arch/arm/include/asm/fsl_secure_boot.h +++ b/arch/arm/include/asm/fsl_secure_boot.h @@ -70,7 +70,7 @@ /* Copying Bootscript and Header to DDR from NOR for LS2 and for rest, from * Non-XIP Memory (Nand/SD)*/ #if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_FSL_LSCH3) || \ - defined(CONFIG_SD_BOOT) + defined(CONFIG_SD_BOOT) || defined(CONFIG_NAND_BOOT) #define CONFIG_BOOTSCRIPT_COPY_RAM #endif /* The address needs to be modified according to NOR, NAND, SD and @@ -96,6 +96,11 @@ #define CONFIG_BS_ADDR_DEVICE 0x00000940 #define CONFIG_BS_HDR_SIZE 0x00000010 #define CONFIG_BS_SIZE 0x00000008 +#elif defined(CONFIG_NAND_BOOT) +#define CONFIG_BS_HDR_ADDR_DEVICE 0x00800000 +#define CONFIG_BS_ADDR_DEVICE 0x00802000 +#define CONFIG_BS_HDR_SIZE 0x00002000 +#define CONFIG_BS_SIZE 0x00001000 #elif defined(CONFIG_QSPI_BOOT) #ifdef CONFIG_ARCH_LS1046A #define CONFIG_BS_HDR_ADDR_DEVICE 0x40780000 diff --git a/board/freescale/ls1043ardb/MAINTAINERS b/board/freescale/ls1043ardb/MAINTAINERS index 8b69892bbb..87aa006455 100644 --- a/board/freescale/ls1043ardb/MAINTAINERS +++ b/board/freescale/ls1043ardb/MAINTAINERS @@ -13,3 +13,4 @@ M: Ruchika Gupta S: Maintained F: configs/ls1043ardb_SECURE_BOOT_defconfig F: configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig +F: configs/ls1043ardb_nand_SECURE_BOOT_defconfig diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig new file mode 100644 index 0000000000..66c89fa532 --- /dev/null +++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig @@ -0,0 +1,57 @@ +CONFIG_ARM=y +CONFIG_TARGET_LS1043ARDB=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SPL_NAND_SUPPORT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT" +CONFIG_NAND_BOOT=y +CONFIG_SECURE_BOOT=y +CONFIG_BOOTDELAY=10 +CONFIG_SPL=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0 +CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_I2C=y +CONFIG_CMD_USB=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_PXE=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_FAT=y +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_OF_CONTROL=y +CONFIG_DM=y +CONFIG_SPL_DM=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_NETDEVICES=y +CONFIG_E1000=y +CONFIG_PCI=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_LAYERSCAPE=y +CONFIG_SYS_NS16550=y +CONFIG_DM_SPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_STORAGE=y +CONFIG_RSA=y +CONFIG_SPL_RSA=y +CONFIG_SPL_CRYPTO_SUPPORT=y +CONFIG_SPL_HASH_SUPPORT=y diff --git a/include/config_fsl_chain_trust.h b/include/config_fsl_chain_trust.h index eb45e9851f..40d323e004 100644 --- a/include/config_fsl_chain_trust.h +++ b/include/config_fsl_chain_trust.h @@ -81,17 +81,18 @@ "setenv bs_size " __stringify(CONFIG_BS_SIZE)";" /* For secure boot flow, default environment used will be used */ -#if defined(CONFIG_SYS_RAMBOOT) -#if defined(CONFIG_RAMBOOT_NAND) +#if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_NAND_BOOT) || \ + defined(CONFIG_SD_BOOT) +#if defined(CONFIG_RAMBOOT_NAND) || defined(CONFIG_NAND_BOOT) #define CONFIG_BS_COPY_CMD \ "nand read $bs_hdr_ram $bs_hdr_device $bs_hdr_size ;" \ "nand read $bs_ram $bs_device $bs_size ;" -#endif /* CONFIG_RAMBOOT_NAND */ #elif defined(CONFIG_SD_BOOT) #define CONFIG_BS_COPY_CMD \ "mmc read $bs_hdr_ram $bs_hdr_device $bs_hdr_size ;" \ "mmc read $bs_ram $bs_device $bs_size ;" -#else /* CONFIG_SD_BOOT */ +#endif +#else #define CONFIG_BS_COPY_CMD \ "cp.b $bs_hdr_device $bs_hdr_ram $bs_hdr_size ;" \ "cp.b $bs_device $bs_ram $bs_size ;" diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index c63c5e3403..7b1d9bbbed 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -110,7 +110,23 @@ #define CONFIG_SPL_BSS_START_ADDR 0x80100000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 -#define CONFIG_SYS_MONITOR_LEN 0xa0000 + +#ifdef CONFIG_SECURE_BOOT +#define CONFIG_U_BOOT_HDR_SIZE (16 << 10) +#endif /* ifdef CONFIG_SECURE_BOOT */ + +#ifdef CONFIG_U_BOOT_HDR_SIZE +/* + * HDR would be appended at end of image and copied to DDR along + * with U-Boot image. Here u-boot max. size is 512K. So if binary + * size increases then increase this size in case of secure boot as + * it uses raw u-boot image instead of fit image. + */ +#define CONFIG_SYS_MONITOR_LEN (0x100000 + CONFIG_U_BOOT_HDR_SIZE) +#else +#define CONFIG_SYS_MONITOR_LEN 0x100000 +#endif /* ifdef CONFIG_U_BOOT_HDR_SIZE */ + #endif /* IFC */ diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index ea929d1da0..5e570cd5e8 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -136,7 +136,7 @@ #ifdef CONFIG_NAND_BOOT #define CONFIG_SPL_PAD_TO 0x20000 /* block aligned */ #define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO -#define CONFIG_SYS_NAND_U_BOOT_SIZE (640 << 10) +#define CONFIG_SYS_NAND_U_BOOT_SIZE (1024 << 10) #endif /* From 511fc86d0b1b603532056c663c22b91056908755 Mon Sep 17 00:00:00 2001 From: Ruchika Gupta Date: Mon, 17 Apr 2017 18:07:19 +0530 Subject: [PATCH 14/24] arm: ls1046ardb: Add SD secure boot target - Add SD secure boot target for ls1046ardb. - Change the u-boot size defined by a macro for copying the main U-Boot by SPL to also include the u-boot Secure Boot header size as header is appended to u-boot image. So header will also be copied from SD to DDR. - CONFIG_MAX_SPL_SIZE is limited to 90KB. SPL is copied to OCRAM (128K) where 32K are reserved for use by boot ROM and 6K for the header. - Reduce the size of CAAM driver for SPL Blobification functions and descriptors, that are not required at the time of SPL are disabled. Further error code conversion to strings is disabled for SPL build. Signed-off-by: Vinitha Pillai Signed-off-by: Sumit Garg Signed-off-by: Ruchika Gupta Reviewed-by: York Sun --- arch/arm/include/asm/fsl_secure_boot.h | 2 +- board/freescale/ls1046ardb/MAINTAINERS | 6 +++ .../ls1046ardb_sdcard_SECURE_BOOT_defconfig | 45 +++++++++++++++++++ drivers/crypto/fsl/jobdesc.c | 4 +- drivers/crypto/fsl/jr.c | 19 ++++---- include/configs/ls1046a_common.h | 16 ++++++- 6 files changed, 78 insertions(+), 14 deletions(-) create mode 100644 configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig diff --git a/arch/arm/include/asm/fsl_secure_boot.h b/arch/arm/include/asm/fsl_secure_boot.h index 1fd09f205a..7bff8b7561 100644 --- a/arch/arm/include/asm/fsl_secure_boot.h +++ b/arch/arm/include/asm/fsl_secure_boot.h @@ -88,7 +88,7 @@ /* For SD boot address and size are assigned in terms of sector * offset and no. of sectors respectively. */ -#if defined(CONFIG_LS1043A) +#if defined(CONFIG_LS1043A) || defined(CONFIG_ARCH_LS1046A) #define CONFIG_BS_HDR_ADDR_DEVICE 0x00000920 #else #define CONFIG_BS_HDR_ADDR_DEVICE 0x00000900 diff --git a/board/freescale/ls1046ardb/MAINTAINERS b/board/freescale/ls1046ardb/MAINTAINERS index 758ff9d572..79a2290974 100644 --- a/board/freescale/ls1046ardb/MAINTAINERS +++ b/board/freescale/ls1046ardb/MAINTAINERS @@ -8,6 +8,12 @@ F: configs/ls1046ardb_qspi_defconfig F: configs/ls1046ardb_sdcard_defconfig F: configs/ls1046ardb_emmc_defconfig +LS1046A_SECURE_BOOT BOARD +M: Ruchika Gupta +S: Maintained +F: configs/ls1046ardb_SECURE_BOOT_defconfig +F: configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig + M: Sumit Garg S: Maintained F: configs/ls1046ardb_qspi_SECURE_BOOT_defconfig diff --git a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig new file mode 100644 index 0000000000..a41ec80d3a --- /dev/null +++ b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig @@ -0,0 +1,45 @@ +CONFIG_ARM=y +CONFIG_TARGET_LS1046ARDB=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL" +CONFIG_SECURE_BOOT=y +CONFIG_SD_BOOT=y +CONFIG_BOOTDELAY=10 +CONFIG_SPL=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 +CONFIG_HUSH_PARSER=y +# CONFIG_CMD_IMLS is not set +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_I2C=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_FAT=y +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_OF_CONTROL=y +CONFIG_DM=y +CONFIG_SPL_DM=y +CONFIG_SPI_FLASH=y +CONFIG_NETDEVICES=y +CONFIG_E1000=y +CONFIG_PCI=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_LAYERSCAPE=y +CONFIG_SYS_NS16550=y +CONFIG_DM_SPI=y +CONFIG_FSL_QSPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_RSA=y +CONFIG_SPL_RSA=y +CONFIG_SPL_CRYPTO_SUPPORT=y +CONFIG_SPL_HASH_SUPPORT=y diff --git a/drivers/crypto/fsl/jobdesc.c b/drivers/crypto/fsl/jobdesc.c index 6125bbb558..375ff9d0e3 100644 --- a/drivers/crypto/fsl/jobdesc.c +++ b/drivers/crypto/fsl/jobdesc.c @@ -204,7 +204,7 @@ void inline_cnstr_jobdesc_hash(uint32_t *desc, append_store(desc, dma_addr_out, storelen, LDST_CLASS_2_CCB | LDST_SRCDST_BYTE_CONTEXT); } - +#ifndef CONFIG_SPL_BUILD void inline_cnstr_jobdesc_blob_encap(uint32_t *desc, uint8_t *key_idnfr, uint8_t *plain_txt, uint8_t *enc_blob, uint32_t in_sz) @@ -252,7 +252,7 @@ void inline_cnstr_jobdesc_blob_decap(uint32_t *desc, uint8_t *key_idnfr, append_operation(desc, OP_TYPE_DECAP_PROTOCOL | OP_PCLID_BLOB); } - +#endif /* * Descriptor to instantiate RNG State Handle 0 in normal mode and * load the JDKEK, TDKEK and TDSK registers diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c index 1b882291e4..163e729961 100644 --- a/drivers/crypto/fsl/jr.c +++ b/drivers/crypto/fsl/jr.c @@ -342,7 +342,9 @@ static void desc_done(uint32_t status, void *arg) { struct result *x = arg; x->status = status; +#ifndef CONFIG_SPL_BUILD caam_jr_strstatus(status); +#endif x->done = 1; } @@ -436,7 +438,11 @@ static inline int sec_reset_idx(uint8_t sec_idx) return 0; } - +int sec_reset(void) +{ + return sec_reset_idx(0); +} +#ifndef CONFIG_SPL_BUILD static int instantiate_rng(uint8_t sec_idx) { struct result op; @@ -472,11 +478,6 @@ static int instantiate_rng(uint8_t sec_idx) return ret; } -int sec_reset(void) -{ - return sec_reset_idx(0); -} - static u8 get_rng_vid(uint8_t sec_idx) { ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); @@ -561,7 +562,7 @@ static int rng_init(uint8_t sec_idx) return ret; } - +#endif int sec_init_idx(uint8_t sec_idx) { ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); @@ -634,7 +635,7 @@ int sec_init_idx(uint8_t sec_idx) pamu_enable(); #endif - +#ifndef CONFIG_SPL_BUILD if (get_rng_vid(sec_idx) >= 4) { if (rng_init(sec_idx) < 0) { printf("SEC%u: RNG instantiation failed\n", sec_idx); @@ -642,7 +643,7 @@ int sec_init_idx(uint8_t sec_idx) } printf("SEC%u: RNG instantiated\n", sec_idx); } - +#endif return ret; } diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 164a5f3884..957ffd3634 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -85,7 +85,19 @@ #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ CONFIG_SPL_BSS_MAX_SIZE) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 -#define CONFIG_SYS_MONITOR_LEN 0xa0000 + +#ifdef CONFIG_SECURE_BOOT +#define CONFIG_U_BOOT_HDR_SIZE (16 << 10) +/* + * HDR would be appended at end of image and copied to DDR along + * with U-Boot image. Here u-boot max. size is 512K. So if binary + * size increases then increase this size in case of secure boot as + * it uses raw u-boot image instead of fit image. + */ +#define CONFIG_SYS_MONITOR_LEN (0x100000 + CONFIG_U_BOOT_HDR_SIZE) +#else +#define CONFIG_SYS_MONITOR_LEN 0x100000 +#endif /* ifdef CONFIG_SECURE_BOOT */ #endif /* NAND SPL */ @@ -105,7 +117,7 @@ #define CONFIG_SPL_NAND_SUPPORT #define CONFIG_SPL_DRIVERS_MISC_SUPPORT #define CONFIG_SPL_TEXT_BASE 0x10000000 -#define CONFIG_SPL_MAX_SIZE 0x1d000 /* 116 KiB */ +#define CONFIG_SPL_MAX_SIZE 0x17000 /* 90 KiB */ #define CONFIG_SPL_STACK 0x1001f000 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE From 4a3ab193222d495ad55b3902fde2654489ad767b Mon Sep 17 00:00:00 2001 From: York Sun Date: Mon, 27 Mar 2017 11:41:01 -0700 Subject: [PATCH 15/24] armv8: ls2080a: Drop macro CONFIG_LS2080A Use CONFIG_ARCH_LS2080A instead. Signed-off-by: York Sun --- arch/arm/cpu/armv8/fsl-layerscape/Makefile | 2 +- arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 6 +++--- arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S | 2 +- arch/arm/cpu/armv8/fsl-layerscape/spl.c | 2 +- arch/arm/include/asm/arch-fsl-layerscape/config.h | 2 +- arch/arm/include/asm/arch-fsl-layerscape/cpu.h | 2 +- arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h | 2 +- arch/arm/include/asm/fsl_secure_boot.h | 2 +- configs/ls2080a_emu_defconfig | 2 +- configs/ls2080a_simu_defconfig | 2 +- configs/ls2080aqds_SECURE_BOOT_defconfig | 1 - configs/ls2080aqds_defconfig | 1 - configs/ls2080aqds_nand_defconfig | 2 +- configs/ls2080aqds_qspi_defconfig | 2 +- configs/ls2080ardb_SECURE_BOOT_defconfig | 1 - configs/ls2080ardb_defconfig | 1 - configs/ls2080ardb_nand_defconfig | 2 +- drivers/crypto/fsl/jr.c | 2 +- drivers/net/ldpaa_eth/Makefile | 2 +- include/linux/usb/xhci-fsl.h | 2 +- scripts/config_whitelist.txt | 1 - 21 files changed, 18 insertions(+), 23 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Makefile b/arch/arm/cpu/armv8/fsl-layerscape/Makefile index c9ab93e3d7..04354d7063 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Makefile +++ b/arch/arm/cpu/armv8/fsl-layerscape/Makefile @@ -22,7 +22,7 @@ obj-$(CONFIG_SYS_HAS_SERDES) += fsl_lsch2_serdes.o endif endif -ifneq ($(CONFIG_LS2080A),) +ifneq ($(CONFIG_ARCH_LS2080A),) obj-$(CONFIG_SYS_HAS_SERDES) += ls2080a_serdes.o endif diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index d446527616..c24f3f173c 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -92,7 +92,7 @@ static inline void early_mmu_setup(void) static void fix_pcie_mmu_map(void) { -#ifdef CONFIG_LS2080A +#ifdef CONFIG_ARCH_LS2080A unsigned int i; u32 svr, ver; struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); @@ -523,7 +523,7 @@ int timer_init(void) #ifdef CONFIG_FSL_LSCH3 u32 __iomem *cltbenr = (u32 *)CONFIG_SYS_FSL_PMU_CLTBENR; #endif -#ifdef CONFIG_LS2080A +#ifdef CONFIG_ARCH_LS2080A u32 __iomem *pctbenr = (u32 *)FSL_PMU_PCTBENR_OFFSET; u32 svr_dev_id; #endif @@ -541,7 +541,7 @@ int timer_init(void) out_le32(cltbenr, 0xf); #endif -#ifdef CONFIG_LS2080A +#ifdef CONFIG_ARCH_LS2080A /* * In certain Layerscape SoCs, the clock for each core's * has an enable bit in the PMU Physical Core Time Base Enable diff --git a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S index a2185f2def..fa6b6e624a 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S +++ b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S @@ -76,7 +76,7 @@ ENTRY(lowlevel_init) #ifdef CONFIG_FSL_LSCH3 /* Set Wuo bit for RN-I 20 */ -#ifdef CONFIG_LS2080A +#ifdef CONFIG_ARCH_LS2080A ldr x0, =CCI_AUX_CONTROL_BASE(20) ldr x1, =0x00000010 bl ccn504_set_aux diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c b/arch/arm/cpu/armv8/fsl-layerscape/spl.c index dfacf98e88..eb730e84a4 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c @@ -65,7 +65,7 @@ void board_init_f(ulong dummy) memset((void *)gd, 0, sizeof(gd_t)); board_early_init_f(); timer_init(); -#ifdef CONFIG_LS2080A +#ifdef CONFIG_ARCH_LS2080A env_init(); #endif get_clocks(); diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index 4db11b646e..fb18440996 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -18,7 +18,7 @@ */ #define CONFIG_SYS_MEM_RESERVE_SECURE (2048 * 1024) /* 2MB */ -#ifdef CONFIG_LS2080A +#ifdef CONFIG_ARCH_LS2080A #define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1, 4, 4 } #define SRDS_MAX_LANES 8 #define CONFIG_SYS_PAGE_SIZE 0x10000 diff --git a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h index bcf3e3863e..95c3e2fc08 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h @@ -249,7 +249,7 @@ static struct mm_region final_map[] = { PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN }, -#ifdef CONFIG_LS2080A +#ifdef CONFIG_ARCH_LS2080A { CONFIG_SYS_PCIE4_PHYS_ADDR, CONFIG_SYS_PCIE4_PHYS_ADDR, CONFIG_SYS_PCIE4_PHYS_SIZE, PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | diff --git a/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h b/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h index 70181c5077..a8f9a50501 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h @@ -9,7 +9,7 @@ #include -#ifdef CONFIG_LS2080A +#ifdef CONFIG_ARCH_LS2080A enum srds_prtcl { /* * Nobody will check whether the device 'NONE' has been configured, diff --git a/arch/arm/include/asm/fsl_secure_boot.h b/arch/arm/include/asm/fsl_secure_boot.h index 7bff8b7561..2799a604ff 100644 --- a/arch/arm/include/asm/fsl_secure_boot.h +++ b/arch/arm/include/asm/fsl_secure_boot.h @@ -55,7 +55,7 @@ #define CONFIG_ESBC_ADDR_64BIT #endif -#ifdef CONFIG_LS2080A +#ifdef CONFIG_ARCH_LS2080A #define CONFIG_EXTRA_ENV \ "setenv fdt_high 0xa0000000;" \ "setenv initrd_high 0xcfffffff;" \ diff --git a/configs/ls2080a_emu_defconfig b/configs/ls2080a_emu_defconfig index edf76851a3..6211b6b5af 100644 --- a/configs/ls2080a_emu_defconfig +++ b/configs/ls2080a_emu_defconfig @@ -5,7 +5,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="EMU,LS2080A" +CONFIG_SYS_EXTRA_OPTIONS="EMU" CONFIG_BOOTDELAY=10 # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMD_CONSOLE is not set diff --git a/configs/ls2080a_simu_defconfig b/configs/ls2080a_simu_defconfig index 5cc9316a20..b6f7709af2 100644 --- a/configs/ls2080a_simu_defconfig +++ b/configs/ls2080a_simu_defconfig @@ -5,7 +5,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SIMU, LS2080A" +CONFIG_SYS_EXTRA_OPTIONS="SIMU" CONFIG_BOOTDELAY=10 # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMD_CONSOLE is not set diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig b/configs/ls2080aqds_SECURE_BOOT_defconfig index 6ab9703c45..45e5d87f36 100644 --- a/configs/ls2080aqds_SECURE_BOOT_defconfig +++ b/configs/ls2080aqds_SECURE_BOOT_defconfig @@ -7,7 +7,6 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="LS2080A" CONFIG_BOOTDELAY=10 CONFIG_CMD_GREPENV=y CONFIG_CMD_GPT=y diff --git a/configs/ls2080aqds_defconfig b/configs/ls2080aqds_defconfig index fb9a3e4041..770dea0605 100644 --- a/configs/ls2080aqds_defconfig +++ b/configs/ls2080aqds_defconfig @@ -7,7 +7,6 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="LS2080A" CONFIG_BOOTDELAY=10 CONFIG_CMD_GREPENV=y CONFIG_CMD_GPT=y diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig index 2a649c576d..aa4f134558 100644 --- a/configs/ls2080aqds_nand_defconfig +++ b/configs/ls2080aqds_nand_defconfig @@ -10,7 +10,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="NAND, LS2080A" +CONFIG_SYS_EXTRA_OPTIONS="NAND" CONFIG_BOOTDELAY=10 CONFIG_SPL=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls2080aqds_qspi_defconfig b/configs/ls2080aqds_qspi_defconfig index a81e7c6945..6deb0acbd2 100644 --- a/configs/ls2080aqds_qspi_defconfig +++ b/configs/ls2080aqds_qspi_defconfig @@ -5,7 +5,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT,LS2080A" +CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT" CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_CMD_GREPENV=y diff --git a/configs/ls2080ardb_SECURE_BOOT_defconfig b/configs/ls2080ardb_SECURE_BOOT_defconfig index 70baf0efc8..19c9db5ae8 100644 --- a/configs/ls2080ardb_SECURE_BOOT_defconfig +++ b/configs/ls2080ardb_SECURE_BOOT_defconfig @@ -7,7 +7,6 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="LS2080A" CONFIG_BOOTDELAY=10 CONFIG_CMD_GREPENV=y CONFIG_CMD_GPT=y diff --git a/configs/ls2080ardb_defconfig b/configs/ls2080ardb_defconfig index a1e552d69a..e0cb7f898e 100644 --- a/configs/ls2080ardb_defconfig +++ b/configs/ls2080ardb_defconfig @@ -7,7 +7,6 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="LS2080A" CONFIG_BOOTDELAY=10 CONFIG_CMD_GREPENV=y CONFIG_CMD_GPT=y diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig index 81987fe6b3..cd57374a4e 100644 --- a/configs/ls2080ardb_nand_defconfig +++ b/configs/ls2080ardb_nand_defconfig @@ -10,7 +10,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="NAND, LS2080A" +CONFIG_SYS_EXTRA_OPTIONS="NAND" CONFIG_BOOTDELAY=10 CONFIG_SPL=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c index 163e729961..f4f6c16df7 100644 --- a/drivers/crypto/fsl/jr.c +++ b/drivers/crypto/fsl/jr.c @@ -587,7 +587,7 @@ int sec_init_idx(uint8_t sec_idx) * For AXI Read - Cacheable, Read allocate * Only For LS2080a, to solve CAAM coherency issues */ -#ifdef CONFIG_LS2080A +#ifdef CONFIG_ARCH_LS2080A mcr = (mcr & ~MCFGR_AWCACHE_MASK) | (0xb << MCFGR_AWCACHE_SHIFT); mcr = (mcr & ~MCFGR_ARCACHE_MASK) | (0x6 << MCFGR_ARCACHE_SHIFT); #else diff --git a/drivers/net/ldpaa_eth/Makefile b/drivers/net/ldpaa_eth/Makefile index 5587aa618d..08675ec641 100644 --- a/drivers/net/ldpaa_eth/Makefile +++ b/drivers/net/ldpaa_eth/Makefile @@ -6,4 +6,4 @@ obj-y += ldpaa_wriop.o obj-y += ldpaa_eth.o -obj-$(CONFIG_LS2080A) += ls2080a.o +obj-$(CONFIG_ARCH_LS2080A) += ls2080a.o diff --git a/include/linux/usb/xhci-fsl.h b/include/linux/usb/xhci-fsl.h index 1fa31613bb..23e5939f3b 100644 --- a/include/linux/usb/xhci-fsl.h +++ b/include/linux/usb/xhci-fsl.h @@ -58,7 +58,7 @@ struct fsl_xhci { #define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB1_ADDR #define CONFIG_SYS_FSL_XHCI_USB2_ADDR 0 #define CONFIG_SYS_FSL_XHCI_USB3_ADDR 0 -#elif defined(CONFIG_LS2080A) +#elif defined(CONFIG_ARCH_LS2080A) #define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB1_ADDR #define CONFIG_SYS_FSL_XHCI_USB2_ADDR CONFIG_SYS_XHCI_USB2_ADDR #define CONFIG_SYS_FSL_XHCI_USB3_ADDR 0 diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index d487be72ff..dd8abc0de1 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -1700,7 +1700,6 @@ CONFIG_LQ038J7DH53 CONFIG_LS102XA CONFIG_LS102XA_STREAM_ID CONFIG_LS1043A -CONFIG_LS2080A CONFIG_LSCHLV2 CONFIG_LSXHL CONFIG_LUAN From c1303bfd7e14f5ee451f6aafeeca2d87ac1255d6 Mon Sep 17 00:00:00 2001 From: York Sun Date: Mon, 27 Mar 2017 11:41:02 -0700 Subject: [PATCH 16/24] armv8: ls1043a: Drop macro CONFIG_LS1043A Use CONFIG_ARCH_LS1043A instead. Signed-off-by: York Sun --- arch/arm/cpu/armv8/fsl-layerscape/Makefile | 2 +- arch/arm/include/asm/arch-fsl-layerscape/config.h | 2 +- arch/arm/include/asm/fsl_secure_boot.h | 2 +- drivers/net/fm/Makefile | 2 +- include/configs/ls1043a_common.h | 1 - include/linux/usb/xhci-fsl.h | 2 +- scripts/config_whitelist.txt | 1 - 7 files changed, 5 insertions(+), 7 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Makefile b/arch/arm/cpu/armv8/fsl-layerscape/Makefile index 04354d7063..e3ce0184d8 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Makefile +++ b/arch/arm/cpu/armv8/fsl-layerscape/Makefile @@ -26,7 +26,7 @@ ifneq ($(CONFIG_ARCH_LS2080A),) obj-$(CONFIG_SYS_HAS_SERDES) += ls2080a_serdes.o endif -ifneq ($(CONFIG_LS1043A),) +ifneq ($(CONFIG_ARCH_LS1043A),) obj-$(CONFIG_SYS_HAS_SERDES) += ls1043a_serdes.o obj-$(CONFIG_ARMV8_PSCI) += ls1043a_psci.o endif diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index fb18440996..93e6597d9e 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -132,7 +132,7 @@ #define CONFIG_SYS_FSL_PEX_LUT_BE /* SoC related */ -#ifdef CONFIG_LS1043A +#ifdef CONFIG_ARCH_LS1043A #define CONFIG_SYS_FMAN_V3 #define CONFIG_SYS_NUM_FMAN 1 #define CONFIG_SYS_NUM_FM1_DTSEC 7 diff --git a/arch/arm/include/asm/fsl_secure_boot.h b/arch/arm/include/asm/fsl_secure_boot.h index 2799a604ff..f5ca5d3b69 100644 --- a/arch/arm/include/asm/fsl_secure_boot.h +++ b/arch/arm/include/asm/fsl_secure_boot.h @@ -88,7 +88,7 @@ /* For SD boot address and size are assigned in terms of sector * offset and no. of sectors respectively. */ -#if defined(CONFIG_LS1043A) || defined(CONFIG_ARCH_LS1046A) +#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A) #define CONFIG_BS_HDR_ADDR_DEVICE 0x00000920 #else #define CONFIG_BS_HDR_ADDR_DEVICE 0x00000900 diff --git a/drivers/net/fm/Makefile b/drivers/net/fm/Makefile index fa96bad902..fc7a6da03b 100644 --- a/drivers/net/fm/Makefile +++ b/drivers/net/fm/Makefile @@ -34,5 +34,5 @@ obj-$(CONFIG_ARCH_T4240) += t4240.o obj-$(CONFIG_ARCH_T4160) += t4240.o obj-$(CONFIG_ARCH_B4420) += b4860.o obj-$(CONFIG_ARCH_B4860) += b4860.o -obj-$(CONFIG_LS1043A) += ls1043.o +obj-$(CONFIG_ARCH_LS1043A) += ls1043.o obj-$(CONFIG_ARCH_LS1046A) += ls1046.o diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 7b1d9bbbed..e26924877d 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -28,7 +28,6 @@ #define CONFIG_REMAKE_ELF #define CONFIG_FSL_LAYERSCAPE -#define CONFIG_LS1043A #define CONFIG_MP #define CONFIG_GICV2 diff --git a/include/linux/usb/xhci-fsl.h b/include/linux/usb/xhci-fsl.h index 23e5939f3b..e0dff30f38 100644 --- a/include/linux/usb/xhci-fsl.h +++ b/include/linux/usb/xhci-fsl.h @@ -62,7 +62,7 @@ struct fsl_xhci { #define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB1_ADDR #define CONFIG_SYS_FSL_XHCI_USB2_ADDR CONFIG_SYS_XHCI_USB2_ADDR #define CONFIG_SYS_FSL_XHCI_USB3_ADDR 0 -#elif defined(CONFIG_LS1043A) || defined(CONFIG_ARCH_LS1046A) +#elif defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A) #define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB1_ADDR #define CONFIG_SYS_FSL_XHCI_USB2_ADDR CONFIG_SYS_XHCI_USB2_ADDR #define CONFIG_SYS_FSL_XHCI_USB3_ADDR CONFIG_SYS_XHCI_USB3_ADDR diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index dd8abc0de1..b7b7a24d54 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -1699,7 +1699,6 @@ CONFIG_LPUART_32B_REG CONFIG_LQ038J7DH53 CONFIG_LS102XA CONFIG_LS102XA_STREAM_ID -CONFIG_LS1043A CONFIG_LSCHLV2 CONFIG_LSXHL CONFIG_LUAN From 73fb583829efb296ecdddb08c426e2261cb84d0a Mon Sep 17 00:00:00 2001 From: York Sun Date: Mon, 27 Mar 2017 11:41:03 -0700 Subject: [PATCH 17/24] armv7: ls1021a: Drop macro CONFIG_LS102XA Use CONFIG_ARCH_LS1021A instead. Signed-off-by: York Sun --- arch/arm/cpu/armv7/Makefile | 2 +- arch/arm/dts/Makefile | 2 +- arch/arm/include/asm/arch-ls102xa/config.h | 2 +- arch/arm/include/asm/config.h | 2 +- board/freescale/common/arm_sleep.c | 6 +++--- board/freescale/common/fsl_chain_of_trust.c | 2 +- board/freescale/common/fsl_validate.c | 2 +- drivers/i2c/mxc_i2c.c | 2 +- drivers/qe/qe.c | 6 +++--- drivers/usb/common/fsl-errata.c | 2 +- include/configs/ls1021aiot.h | 2 -- include/configs/ls1021aqds.h | 2 -- include/configs/ls1021atwr.h | 2 -- include/fsl_errata.h | 4 ++-- include/linux/immap_qe.h | 2 +- include/linux/usb/xhci-fsl.h | 2 +- include/tsec.h | 2 +- include/usb/ehci-ci.h | 2 +- scripts/config_whitelist.txt | 1 - 19 files changed, 20 insertions(+), 27 deletions(-) diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile index 02e8778be5..999ab47065 100644 --- a/arch/arm/cpu/armv7/Makefile +++ b/arch/arm/cpu/armv7/Makefile @@ -12,7 +12,7 @@ obj-y += cache_v7.o cache_v7_asm.o obj-y += cpu.o cp15.o obj-y += syslib.o -ifneq ($(CONFIG_AM43XX)$(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_MX6)$(CONFIG_MX7)$(CONFIG_TI81XX)$(CONFIG_AT91FAMILY)$(CONFIG_ARCH_SUNXI)$(CONFIG_ARCH_SOCFPGA)$(CONFIG_ARCH_MX7ULP)$(CONFIG_LS102XA),) +ifneq ($(CONFIG_AM43XX)$(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_MX6)$(CONFIG_MX7)$(CONFIG_TI81XX)$(CONFIG_AT91FAMILY)$(CONFIG_ARCH_SUNXI)$(CONFIG_ARCH_SOCFPGA)$(CONFIG_ARCH_MX7ULP)$(CONFIG_ARCH_LS1021A),) ifneq ($(CONFIG_SKIP_LOWLEVEL_INIT),y) obj-y += lowlevel_init.o endif diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 68d2791c15..0ee42818f6 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -166,7 +166,7 @@ dtb-$(CONFIG_TARGET_AM57XX_EVM) += am57xx-beagle-x15.dtb \ am571x-idk.dtb dtb-$(CONFIG_TARGET_STV0991) += stv0991.dtb -dtb-$(CONFIG_LS102XA) += ls1021a-qds-duart.dtb \ +dtb-$(CONFIG_ARCH_LS1021A) += ls1021a-qds-duart.dtb \ ls1021a-qds-lpuart.dtb \ ls1021a-twr-duart.dtb ls1021a-twr-lpuart.dtb \ ls1021a-iot-duart.dtb diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h index 2f7233f2fe..5c4da0f0e3 100644 --- a/arch/arm/include/asm/arch-ls102xa/config.h +++ b/arch/arm/include/asm/arch-ls102xa/config.h @@ -108,7 +108,7 @@ #define DCU_LAYER_MAX_NUM 16 -#ifdef CONFIG_LS102XA +#ifdef CONFIG_ARCH_LS1021A #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1 #else diff --git a/arch/arm/include/asm/config.h b/arch/arm/include/asm/config.h index 1ad221a987..5674d37c04 100644 --- a/arch/arm/include/asm/config.h +++ b/arch/arm/include/asm/config.h @@ -14,7 +14,7 @@ #define CONFIG_STATIC_RELA #endif -#if defined(CONFIG_LS102XA) || \ +#if defined(CONFIG_ARCH_LS1021A) || \ defined(CONFIG_CPU_PXA27X) || \ defined(CONFIG_CPU_MONAHANS) || \ defined(CONFIG_CPU_PXA25X) || \ diff --git a/board/freescale/common/arm_sleep.c b/board/freescale/common/arm_sleep.c index 16fd445306..6ed5d9ef1f 100644 --- a/board/freescale/common/arm_sleep.c +++ b/board/freescale/common/arm_sleep.c @@ -13,7 +13,7 @@ #endif #include -#if defined(CONFIG_LS102XA) +#if defined(CONFIG_ARCH_LS1021A) #include #endif @@ -66,7 +66,7 @@ static void dp_ddr_restore(void) *dst++ = *src++; } -#if defined(CONFIG_ARMV7_PSCI) && defined(CONFIG_LS102XA) +#if defined(CONFIG_ARMV7_PSCI) && defined(CONFIG_ARCH_LS1021A) void ls1_psci_resume_fixup(void) { u32 tmp; @@ -104,7 +104,7 @@ static void dp_resume_prepare(void) #ifdef CONFIG_U_QE u_qe_resume(); #endif -#if defined(CONFIG_ARMV7_PSCI) && defined(CONFIG_LS102XA) +#if defined(CONFIG_ARMV7_PSCI) && defined(CONFIG_ARCH_LS1021A) ls1_psci_resume_fixup(); #endif } diff --git a/board/freescale/common/fsl_chain_of_trust.c b/board/freescale/common/fsl_chain_of_trust.c index 438e781957..aad1b93d14 100644 --- a/board/freescale/common/fsl_chain_of_trust.c +++ b/board/freescale/common/fsl_chain_of_trust.c @@ -22,7 +22,7 @@ #include #endif -#ifdef CONFIG_LS102XA +#ifdef CONFIG_ARCH_LS1021A #include #endif diff --git a/board/freescale/common/fsl_validate.c b/board/freescale/common/fsl_validate.c index 125655a37a..ed48c5c8bd 100644 --- a/board/freescale/common/fsl_validate.c +++ b/board/freescale/common/fsl_validate.c @@ -15,7 +15,7 @@ #include #include #include -#ifdef CONFIG_LS102XA +#ifdef CONFIG_ARCH_LS1021A #include #endif diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c index eb789f5bff..13ec0e63b1 100644 --- a/drivers/i2c/mxc_i2c.c +++ b/drivers/i2c/mxc_i2c.c @@ -589,7 +589,7 @@ static int bus_i2c_write(struct mxc_i2c_bus *i2c_bus, u8 chip, u32 addr, #endif static struct mxc_i2c_bus mxc_i2c_buses[] = { -#if defined(CONFIG_LS102XA) || defined(CONFIG_VF610) || \ +#if defined(CONFIG_ARCH_LS1021A) || defined(CONFIG_VF610) || \ defined(CONFIG_FSL_LAYERSCAPE) { 0, I2C1_BASE_ADDR, I2C_QUIRK_FLAG }, { 1, I2C2_BASE_ADDR, I2C_QUIRK_FLAG }, diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c index 4231594776..4f0a27892f 100644 --- a/drivers/qe/qe.c +++ b/drivers/qe/qe.c @@ -13,7 +13,7 @@ #include #include #include -#ifdef CONFIG_LS102XA +#ifdef CONFIG_ARCH_LS1021A #include #endif @@ -355,7 +355,7 @@ int qe_upload_firmware(const struct qe_firmware *firmware) size_t length; const struct qe_header *hdr; #ifdef CONFIG_DEEP_SLEEP -#ifdef CONFIG_LS102XA +#ifdef CONFIG_ARCH_LS1021A struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR; #else ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); @@ -494,7 +494,7 @@ int u_qe_upload_firmware(const struct qe_firmware *firmware) size_t length; const struct qe_header *hdr; #ifdef CONFIG_DEEP_SLEEP -#ifdef CONFIG_LS102XA +#ifdef CONFIG_ARCH_LS1021A struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR; #else ccsr_gur_t __iomem *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c index 6069c935c1..338ac08d8a 100644 --- a/drivers/usb/common/fsl-errata.c +++ b/drivers/usb/common/fsl-errata.c @@ -204,7 +204,7 @@ bool has_erratum_a010151(void) case SVR_LS1043A: return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1); #endif -#ifdef CONFIG_LS102XA +#ifdef CONFIG_ARCH_LS1021A case SOC_VER_LS1020: case SOC_VER_LS1021: case SOC_VER_LS1022: diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index d8bbc802d2..35d17b96f4 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -7,8 +7,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_LS102XA - #define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR #define CONFIG_SYS_FSL_CLK diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 97b81274b0..c3224c8c3f 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -7,8 +7,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_LS102XA - #define CONFIG_ARMV7_PSCI_1_0 #define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index a60b4b2990..1d0b4698bb 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -7,8 +7,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_LS102XA - #define CONFIG_ARMV7_PSCI_1_0 #define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR diff --git a/include/fsl_errata.h b/include/fsl_errata.h index 8441f91029..89051aa741 100644 --- a/include/fsl_errata.h +++ b/include/fsl_errata.h @@ -10,7 +10,7 @@ #include #if defined(CONFIG_PPC) #include -#elif defined(CONFIG_LS102XA) +#elif defined(CONFIG_ARCH_LS1021A) #include #elif defined(CONFIG_FSL_LAYERSCAPE) #include @@ -66,7 +66,7 @@ static inline bool has_erratum_a008378(void) switch (soc) { -#ifdef CONFIG_LS102XA +#ifdef CONFIG_ARCH_LS1021A case SOC_VER_LS1020: case SOC_VER_LS1021: case SOC_VER_LS1022: diff --git a/include/linux/immap_qe.h b/include/linux/immap_qe.h index 6d1f88ec2e..d952efa8f4 100644 --- a/include/linux/immap_qe.h +++ b/include/linux/immap_qe.h @@ -24,7 +24,7 @@ #endif #endif -#ifdef CONFIG_LS102XA +#ifdef CONFIG_ARCH_LS1021A #define QE_MURAM_SIZE 0x6000UL #define MAX_QE_RISC 1 #define QE_NUM_OF_SNUM 28 diff --git a/include/linux/usb/xhci-fsl.h b/include/linux/usb/xhci-fsl.h index e0dff30f38..bd54089722 100644 --- a/include/linux/usb/xhci-fsl.h +++ b/include/linux/usb/xhci-fsl.h @@ -54,7 +54,7 @@ struct fsl_xhci { struct dwc3 *dwc3_reg; }; -#if defined(CONFIG_LS102XA) || defined(CONFIG_ARCH_LS1012A) +#if defined(CONFIG_ARCH_LS1021A) || defined(CONFIG_ARCH_LS1012A) #define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB1_ADDR #define CONFIG_SYS_FSL_XHCI_USB2_ADDR 0 #define CONFIG_SYS_FSL_XHCI_USB3_ADDR 0 diff --git a/include/tsec.h b/include/tsec.h index fb27edf225..e99a7fa878 100644 --- a/include/tsec.h +++ b/include/tsec.h @@ -20,7 +20,7 @@ #ifndef CONFIG_DM_ETH -#ifdef CONFIG_LS102XA +#ifdef CONFIG_ARCH_LS1021A #define TSEC_SIZE 0x40000 #define TSEC_MDIO_OFFSET 0x40000 #else diff --git a/include/usb/ehci-ci.h b/include/usb/ehci-ci.h index 882aed4a5f..8f3437a208 100644 --- a/include/usb/ehci-ci.h +++ b/include/usb/ehci-ci.h @@ -159,7 +159,7 @@ #elif defined(CONFIG_MPC512X) #define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_MPC512x_USB1_ADDR #define CONFIG_SYS_FSL_USB2_ADDR 0 -#elif defined(CONFIG_LS102XA) +#elif defined(CONFIG_ARCH_LS1021A) #define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_EHCI_USB1_ADDR #define CONFIG_SYS_FSL_USB2_ADDR 0 #endif diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index b7b7a24d54..5e515d215c 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -1697,7 +1697,6 @@ CONFIG_LPC_IO_BASE CONFIG_LPUART CONFIG_LPUART_32B_REG CONFIG_LQ038J7DH53 -CONFIG_LS102XA CONFIG_LS102XA_STREAM_ID CONFIG_LSCHLV2 CONFIG_LSXHL From 6f04976ffbe0ea77087fe1c362c8d20025c75294 Mon Sep 17 00:00:00 2001 From: tang yuantian Date: Fri, 10 Mar 2017 14:49:25 +0800 Subject: [PATCH 18/24] armv8: ls1046aqds: enable ppa in default config Signed-off-by: Tang Yuantian Reviewed-by: York Sun --- configs/ls1046aqds_defconfig | 1 + configs/ls1046aqds_lpuart_defconfig | 1 + configs/ls1046aqds_nand_defconfig | 1 + configs/ls1046aqds_qspi_defconfig | 1 + configs/ls1046aqds_sdcard_ifc_defconfig | 1 + configs/ls1046aqds_sdcard_qspi_defconfig | 1 + 6 files changed, 6 insertions(+) diff --git a/configs/ls1046aqds_defconfig b/configs/ls1046aqds_defconfig index 66b4fd1c9f..b9329337ec 100644 --- a/configs/ls1046aqds_defconfig +++ b/configs/ls1046aqds_defconfig @@ -36,3 +36,4 @@ CONFIG_DM_SPI=y CONFIG_FSL_DSPI=y CONFIG_USB=y CONFIG_DM_USB=y +CONFIG_FSL_LS_PPA=y diff --git a/configs/ls1046aqds_lpuart_defconfig b/configs/ls1046aqds_lpuart_defconfig index 85ef8e0ff2..c282a64da6 100644 --- a/configs/ls1046aqds_lpuart_defconfig +++ b/configs/ls1046aqds_lpuart_defconfig @@ -32,3 +32,4 @@ CONFIG_DM_SPI=y CONFIG_FSL_DSPI=y CONFIG_USB=y CONFIG_DM_USB=y +CONFIG_FSL_LS_PPA=y diff --git a/configs/ls1046aqds_nand_defconfig b/configs/ls1046aqds_nand_defconfig index f0730b626a..923d41755e 100644 --- a/configs/ls1046aqds_nand_defconfig +++ b/configs/ls1046aqds_nand_defconfig @@ -41,3 +41,4 @@ CONFIG_DM_SPI=y CONFIG_FSL_DSPI=y CONFIG_USB=y CONFIG_DM_USB=y +CONFIG_FSL_LS_PPA=y diff --git a/configs/ls1046aqds_qspi_defconfig b/configs/ls1046aqds_qspi_defconfig index 6520cebd5d..5d7da728d2 100644 --- a/configs/ls1046aqds_qspi_defconfig +++ b/configs/ls1046aqds_qspi_defconfig @@ -38,3 +38,4 @@ CONFIG_FSL_DSPI=y CONFIG_FSL_QSPI=y CONFIG_USB=y CONFIG_DM_USB=y +CONFIG_FSL_LS_PPA=y diff --git a/configs/ls1046aqds_sdcard_ifc_defconfig b/configs/ls1046aqds_sdcard_ifc_defconfig index 16bb94dc2f..7e8f1a18f3 100644 --- a/configs/ls1046aqds_sdcard_ifc_defconfig +++ b/configs/ls1046aqds_sdcard_ifc_defconfig @@ -42,3 +42,4 @@ CONFIG_DM_SPI=y CONFIG_FSL_DSPI=y CONFIG_USB=y CONFIG_DM_USB=y +CONFIG_FSL_LS_PPA=y diff --git a/configs/ls1046aqds_sdcard_qspi_defconfig b/configs/ls1046aqds_sdcard_qspi_defconfig index 9e78115e2d..1707bc4a63 100644 --- a/configs/ls1046aqds_sdcard_qspi_defconfig +++ b/configs/ls1046aqds_sdcard_qspi_defconfig @@ -43,3 +43,4 @@ CONFIG_FSL_DSPI=y CONFIG_FSL_QSPI=y CONFIG_USB=y CONFIG_DM_USB=y +CONFIG_FSL_LS_PPA=y From fb806ad61f8ff10f3abb14dfadfe0f8989665445 Mon Sep 17 00:00:00 2001 From: Shengzhou Liu Date: Thu, 23 Mar 2017 18:14:40 +0800 Subject: [PATCH 19/24] arm64/ls1046a: Enable ERRATUM_A008850 for ls1046a SoC Signed-off-by: Shengzhou Liu Reviewed-by: York Sun --- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 9fb76f00ed..2562f4a365 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -36,6 +36,7 @@ config ARCH_LS1046A select SYS_FSL_DDR_VER_50 select SYS_FSL_ERRATUM_A008336 select SYS_FSL_ERRATUM_A008511 + select SYS_FSL_ERRATUM_A008850 select SYS_FSL_ERRATUM_A009801 select SYS_FSL_ERRATUM_A009803 select SYS_FSL_ERRATUM_A009942 From df1a51df3bbd350bb391826b5d96d2152002f7ac Mon Sep 17 00:00:00 2001 From: Santan Kumar Date: Wed, 5 Apr 2017 14:34:32 +0530 Subject: [PATCH 20/24] armv8: ls2080a: Add serdes2 protocol 0x51 support Signed-off-by: Santan Kumar Signed-off-by: Priyanka Jain Reviewed-by: York Sun --- arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c index ab83e85adc..4db3c76d72 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c @@ -70,6 +70,7 @@ static struct serdes_config serdes2_cfg_tbl[] = { SATA2 } }, {0x4A, {SGMII9, SGMII10, SGMII11, SGMII12, PCIE4, PCIE4, SATA1, SATA2 } }, + {0x51, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE4, PCIE4, PCIE4, PCIE4 } }, {0x57, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE4, PCIE4, SGMII15, SGMII16 } }, {} }; From 85a9a14e4b37696366d2f9d58c40a1185011dc4b Mon Sep 17 00:00:00 2001 From: Ashish kumar Date: Fri, 7 Apr 2017 11:40:32 +0530 Subject: [PATCH 21/24] armv8: fsl-lsch3: Instantiate TZASC configuration in 2 groups Number of TZASC instances may vary across NXP SoCs. So put TZASC configuration under instance specific defines. Signed-off-by: Prabhakar Kushwaha Signed-off-by: Ashish Kumar Reviewed-by: York Sun --- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 8 +++++++ arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S | 24 +++++++++++--------- 2 files changed, 21 insertions(+), 11 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 2562f4a365..12fd80e7db 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -64,6 +64,8 @@ config ARCH_LS2080A select SYS_FSL_SEC_COMPAT_5 select SYS_FSL_SEC_LE select SYS_FSL_SRDS_2 + select FSL_TZASC_1 + select FSL_TZASC_2 select SYS_FSL_ERRATUM_A008336 select SYS_FSL_ERRATUM_A008511 select SYS_FSL_ERRATUM_A008514 @@ -238,6 +240,12 @@ config SYS_FSL_SRDS_2 config SYS_HAS_SERDES bool +config FSL_TZASC_1 + bool + +config FSL_TZASC_2 + bool + endmenu menu "Layerscape clock tree configuration" diff --git a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S index fa6b6e624a..f427356104 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S +++ b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S @@ -229,38 +229,40 @@ ENTRY(lowlevel_init) * NOTE: As per the CCSR map doc, TZASC 3 and TZASC 4 are just * placeholders. */ +#ifdef CONFIG_FSL_TZASC_1 ldr x1, =TZASC_GATE_KEEPER(0) ldr w0, [x1] /* Filter 0 Gate Keeper Register */ orr w0, w0, #1 << 0 /* Set open_request for Filter 0 */ str w0, [x1] - ldr x1, =TZASC_GATE_KEEPER(1) - ldr w0, [x1] /* Filter 0 Gate Keeper Register */ - orr w0, w0, #1 << 0 /* Set open_request for Filter 0 */ - str w0, [x1] - ldr x1, =TZASC_REGION_ATTRIBUTES_0(0) ldr w0, [x1] /* Region-0 Attributes Register */ orr w0, w0, #1 << 31 /* Set Sec global write en, Bit[31] */ orr w0, w0, #1 << 30 /* Set Sec global read en, Bit[30] */ str w0, [x1] + ldr x1, =TZASC_REGION_ID_ACCESS_0(0) + ldr w0, [x1] /* Region-0 Access Register */ + mov w0, #0xFFFFFFFF /* Set nsaid_wr_en and nsaid_rd_en */ + str w0, [x1] +#endif +#ifdef CONFIG_FSL_TZASC_2 + ldr x1, =TZASC_GATE_KEEPER(1) + ldr w0, [x1] /* Filter 0 Gate Keeper Register */ + orr w0, w0, #1 << 0 /* Set open_request for Filter 0 */ + str w0, [x1] + ldr x1, =TZASC_REGION_ATTRIBUTES_0(1) ldr w0, [x1] /* Region-1 Attributes Register */ orr w0, w0, #1 << 31 /* Set Sec global write en, Bit[31] */ orr w0, w0, #1 << 30 /* Set Sec global read en, Bit[30] */ str w0, [x1] - ldr x1, =TZASC_REGION_ID_ACCESS_0(0) - ldr w0, [x1] /* Region-0 Access Register */ - mov w0, #0xFFFFFFFF /* Set nsaid_wr_en and nsaid_rd_en */ - str w0, [x1] - ldr x1, =TZASC_REGION_ID_ACCESS_0(1) ldr w0, [x1] /* Region-1 Attributes Register */ mov w0, #0xFFFFFFFF /* Set nsaid_wr_en and nsaid_rd_en */ str w0, [x1] - +#endif isb dsb sy #endif From 3d91f46ca84f6b4a667a41ac1957aebf60764002 Mon Sep 17 00:00:00 2001 From: Yangbo Lu Date: Mon, 10 Apr 2017 15:04:11 +0800 Subject: [PATCH 22/24] armv8/fsl-layerscape: fdt: avoid incorrect fixing with CONFIG_SYS_CLK_FREQ Current sysclk fixing would fix all clocks with 'fixed-clock' compatible. This patch is to fix sysclk by path to avoid any incorrect fixing. Signed-off-by: Yangbo Lu Reviewed-by: York Sun --- arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c index 762a95b945..05c4577753 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c @@ -373,8 +373,8 @@ void ft_cpu_setup(void *blob, bd_t *bd) "clock-frequency", CONFIG_SYS_NS16550_CLK, 1); #endif - do_fixup_by_compat_u32(blob, "fixed-clock", - "clock-frequency", CONFIG_SYS_CLK_FREQ, 1); + do_fixup_by_path_u32(blob, "/sysclk", "clock-frequency", + CONFIG_SYS_CLK_FREQ, 1); #ifdef CONFIG_PCI ft_pci_setup(blob, bd); From 668ec87f523580c981a01b06560f70cd5a52e2c9 Mon Sep 17 00:00:00 2001 From: Ruchika Gupta Date: Thu, 2 Mar 2017 14:12:41 +0530 Subject: [PATCH 23/24] powerpc: e6500: Lock/unlock 1 cache instead of L1 as init_ram For E6500 cores, L2 cache has been used as init_ram. L1 cache is a write through cache on E6500.If lines are not locked in both L1 and L2 caches, crashes are observed during secure boot. This patch locks/ unlocks both L1 and L2 cache to prevent the crash. Signed-off-by: Ruchika Gupta Reviewed-by: York Sun --- arch/powerpc/cpu/mpc85xx/start.S | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index eb817f1e86..63fdffddb1 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -1145,8 +1145,9 @@ switch_as: li r0,0 1: dcbz r0,r3 -#ifdef CONFIG_E6500 /* Lock/unlock L2 cache instead of L1 */ +#ifdef CONFIG_E6500 /* Lock/unlock L2 cache long with L1 */ dcbtls 2, r0, r3 + dcbtls 0, r0, r3 #else dcbtls 0, r0, r3 #endif @@ -1790,8 +1791,9 @@ unlock_ram_in_cache: slwi r4,r4,(10 - 1 - L1_CACHE_SHIFT) mtctr r4 1: dcbi r0,r3 -#ifdef CONFIG_E6500 /* lock/unlock L2 cache instead of L1 */ +#ifdef CONFIG_E6500 /* lock/unlock L2 cache long with L1 */ dcblc 2, r0, r3 + dcblc 0, r0, r3 #else dcblc r0,r3 #endif From e0dfec863e2ca5088dd797a5b6853d4c0df9002c Mon Sep 17 00:00:00 2001 From: Shengzhou Liu Date: Mon, 10 Apr 2017 16:00:08 +0800 Subject: [PATCH 24/24] powerpc/board/t1024rdb: enable board-level reset when issuing reset command As board-specific reset logic, it needs to issue reset signal via CPLD when issuing 'reset' command in u-boot, this patch solves the issue of reset command not working on T1024RDB. Signed-off-by: Shengzhou Liu Reviewed-by: York Sun --- board/freescale/t102xrdb/t102xrdb.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/board/freescale/t102xrdb/t102xrdb.c b/board/freescale/t102xrdb/t102xrdb.c index 56f7c1a909..f370f72baa 100644 --- a/board/freescale/t102xrdb/t102xrdb.c +++ b/board/freescale/t102xrdb/t102xrdb.c @@ -167,6 +167,13 @@ unsigned long get_board_ddr_clk(void) return CONFIG_DDR_CLK_FREQ; } +#ifdef CONFIG_TARGET_T1024RDB +void board_reset(void) +{ + CPLD_WRITE(reset_ctl1, CPLD_LBMAP_RESET); +} +#endif + int misc_init_r(void) { return 0;