Merge branch 'u-boot:master' into master

This commit is contained in:
swordow 2022-12-30 20:27:23 +08:00 committed by GitHub
commit 3bd7943204
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GPG Key ID: 4AEE18F83AFDEB23
112 changed files with 568 additions and 151 deletions

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@ -535,8 +535,10 @@ stages:
BUILDMAN: "uniphier"
aarch64_catch_all:
BUILDMAN: "aarch64 -x amlogic,bcm,imx8,imx9,k3,tegra,ls1,ls2,lx216,mvebu,uniphier,renesas,sunxi,samsung,socfpga,rk,versal,zynq"
rockchip:
BUILDMAN: "rk"
rockchip_32bit:
BUILDMAN: "rk -x aarch64"
rockchip_64bit:
BUILDMAN: "rk&aarch64"
renesas:
BUILDMAN: "renesas"
zynq:

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@ -2372,7 +2372,7 @@ tcheck:
# Documentation targets
# ---------------------------------------------------------------------------
DOC_TARGETS := xmldocs latexdocs pdfdocs htmldocs epubdocs cleandocs \
linkcheckdocs dochelp refcheckdocs
linkcheckdocs dochelp refcheckdocs texinfodocs infodocs
PHONY += $(DOC_TARGETS)
$(DOC_TARGETS): scripts_basic FORCE
$(Q)$(MAKE) $(build)=doc $@

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@ -34,6 +34,7 @@ coff_header:
.short (IMAGE_FILE_EXECUTABLE_IMAGE | \
IMAGE_FILE_LINE_NUMS_STRIPPED | \
IMAGE_FILE_LOCAL_SYMS_STRIPPED | \
IMAGE_FILE_LARGE_ADDRESS_AWARE | \
IMAGE_FILE_DEBUG_STRIPPED)
optional_header:
.short IMAGE_NT_OPTIONAL_HDR64_MAGIC /* PE32+ format */

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@ -1459,14 +1459,14 @@ config SYS_FSL_USB_DUAL_PHY_ENABLE
config SYS_MPC85XX_NO_RESETVEC
bool "Discard resetvec section and move bootpg section up"
depends on MPC85xx
depends on MPC85xx && !MPC85XX_HAVE_RESET_VECTOR
help
If this variable is specified, the section .resetvec is not kept and
the section .bootpg is placed in the previous 4k of the .text section.
config SPL_SYS_MPC85XX_NO_RESETVEC
bool "Discard resetvec section and move bootpg section up, in SPL"
depends on MPC85xx && SPL
depends on MPC85xx && SPL && !MPC85XX_HAVE_RESET_VECTOR
help
If this variable is specified, the section .resetvec is not kept and
the section .bootpg is placed in the previous 4k of the .text section,
@ -1474,7 +1474,7 @@ config SPL_SYS_MPC85XX_NO_RESETVEC
config TPL_SYS_MPC85XX_NO_RESETVEC
bool "Discard resetvec section and move bootpg section up, in TPL"
depends on MPC85xx && TPL
depends on MPC85xx && TPL && !MPC85XX_HAVE_RESET_VECTOR
help
If this variable is specified, the section .resetvec is not kept and
the section .bootpg is placed in the previous 4k of the .text section,

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@ -16,12 +16,23 @@
#define LOAD_LONG(reg, idx) ld reg, (idx*SIZE_LONG)(sp)
#define PE_MACHINE IMAGE_FILE_MACHINE_RISCV64
#define PE_MAGIC IMAGE_NT_OPTIONAL_HDR64_MAGIC
#define IMG_CHARACTERISTICS \
(IMAGE_FILE_EXECUTABLE_IMAGE | \
IMAGE_FILE_LINE_NUMS_STRIPPED | \
IMAGE_FILE_LOCAL_SYMS_STRIPPED | \
IMAGE_FILE_LARGE_ADDRESS_AWARE | \
IMAGE_FILE_DEBUG_STRIPPED)
#else
#define SIZE_LONG 4
#define SAVE_LONG(reg, idx) sw reg, (idx*SIZE_LONG)(sp)
#define LOAD_LONG(reg, idx) lw reg, (idx*SIZE_LONG)(sp)
#define PE_MACHINE IMAGE_FILE_MACHINE_RISCV32
#define PE_MAGIC IMAGE_NT_OPTIONAL_HDR32_MAGIC
#define IMG_CHARACTERISTICS \
(IMAGE_FILE_EXECUTABLE_IMAGE | \
IMAGE_FILE_LINE_NUMS_STRIPPED | \
IMAGE_FILE_LOCAL_SYMS_STRIPPED | \
IMAGE_FILE_DEBUG_STRIPPED)
#endif
@ -47,11 +58,7 @@ coff_header:
.long 0 /* PointerToSymbolTable */
.long 0 /* NumberOfSymbols */
.short section_table - optional_header /* SizeOfOptionalHeader */
/* Characteristics */
.short (IMAGE_FILE_EXECUTABLE_IMAGE | \
IMAGE_FILE_LINE_NUMS_STRIPPED | \
IMAGE_FILE_LOCAL_SYMS_STRIPPED | \
IMAGE_FILE_DEBUG_STRIPPED)
.short IMG_CHARACTERISTICS /* Characteristics */
optional_header:
.short PE_MAGIC /* PE32(+) format */
.byte 0x02 /* MajorLinkerVersion */

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@ -724,16 +724,19 @@ config RAMBOOT_PBL
For more details refer to doc/README.pblimage
choice
prompt "Freescale PBL load location"
prompt "Freescale PBL (or predecessor) load location"
depends on RAMBOOT_PBL || ((TARGET_P1010RDB_PA || TARGET_P1010RDB_PB \
|| TARGET_P1020RDB_PC || TARGET_P1020RDB_PD || TARGET_P2020RDB) \
&& !CMD_NAND)
config SDCARD
bool "Freescale PBL is found on SD card"
bool "Freescale PBL (or similar) is found on SD card"
config SPIFLASH
bool "Freescale PBL is found on SPI flash"
bool "Freescale PBL (or similar) is found on SPI flash"
config NO_PBL
bool "Freescale PBL (or similar) is not used in this case"
endchoice

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@ -1814,7 +1814,7 @@ config SYS_DISABLE_AUTOLOAD
config CMD_WGET
bool "wget"
select TCP
select PROT_TCP
help
wget is a simple command to download kernel, or other files,
from a http server over TCP.

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@ -10,7 +10,6 @@ CONFIG_SYS_INIT_RAM_LOCK=y
CONFIG_TARGET_P1010RDB_PA=y
CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y
CONFIG_PHYS_64BIT=y
@ -19,7 +18,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_FSL_FIXED_MMC_LOCATION=y
CONFIG_NO_PBL=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr"

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@ -10,7 +10,6 @@ CONFIG_SYS_INIT_RAM_LOCK=y
CONFIG_TARGET_P1010RDB_PA=y
CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y
CONFIG_SYS_MONITOR_LEN=786432
@ -18,7 +17,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_FSL_FIXED_MMC_LOCATION=y
CONFIG_NO_PBL=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr"

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@ -10,7 +10,6 @@ CONFIG_SYS_INIT_RAM_LOCK=y
CONFIG_TARGET_P1010RDB_PB=y
CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y
CONFIG_PHYS_64BIT=y
@ -19,7 +18,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_FSL_FIXED_MMC_LOCATION=y
CONFIG_NO_PBL=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr"

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@ -10,7 +10,6 @@ CONFIG_SYS_INIT_RAM_LOCK=y
CONFIG_TARGET_P1010RDB_PB=y
CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y
CONFIG_SYS_MONITOR_LEN=786432
@ -18,7 +17,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_FSL_FIXED_MMC_LOCATION=y
CONFIG_NO_PBL=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr"

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@ -11,7 +11,6 @@ CONFIG_SYS_INIT_RAM_LOCK=y
CONFIG_TARGET_P1020RDB_PC=y
CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y
CONFIG_PHYS_64BIT=y
@ -21,7 +20,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_FSL_FIXED_MMC_LOCATION=y
CONFIG_NO_PBL=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"

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@ -11,7 +11,6 @@ CONFIG_SYS_INIT_RAM_LOCK=y
CONFIG_TARGET_P1020RDB_PC=y
CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y
CONFIG_SYS_MONITOR_LEN=786432
@ -20,7 +19,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_FSL_FIXED_MMC_LOCATION=y
CONFIG_NO_PBL=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"

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@ -11,7 +11,6 @@ CONFIG_SYS_INIT_RAM_LOCK=y
CONFIG_TARGET_P1020RDB_PD=y
CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y
CONFIG_SYS_MONITOR_LEN=786432
@ -20,7 +19,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_FSL_FIXED_MMC_LOCATION=y
CONFIG_NO_PBL=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"

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@ -11,7 +11,6 @@ CONFIG_SYS_INIT_RAM_LOCK=y
CONFIG_TARGET_P2020RDB=y
CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y
CONFIG_PHYS_64BIT=y
@ -21,7 +20,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_FSL_FIXED_MMC_LOCATION=y
CONFIG_NO_PBL=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"

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@ -11,7 +11,6 @@ CONFIG_SYS_INIT_RAM_LOCK=y
CONFIG_TARGET_P2020RDB=y
CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y
CONFIG_SYS_MONITOR_LEN=786432
@ -20,7 +19,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_FSL_FIXED_MMC_LOCATION=y
CONFIG_NO_PBL=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"

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@ -65,7 +65,6 @@ CONFIG_CMD_DNS=y
CONFIG_CMD_BMP=y
CONFIG_CMD_BOOTCOUNT=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_CLS=y
CONFIG_CMD_TIME=y
CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y

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@ -36,7 +36,6 @@ CONFIG_CMD_PCI=y
CONFIG_CMD_BMP=y
CONFIG_CMD_BOOTCOUNT=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_CLS=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y

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@ -34,7 +34,6 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BOOTCOUNT=y
CONFIG_CMD_CLS=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y

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@ -45,7 +45,6 @@ CONFIG_CMD_TIME=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_ENV_SPI_MAX_HZ=30000000
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_ROCKCHIP_GPIO=y
@ -82,7 +81,6 @@ CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_KEYBOARD=y

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@ -30,6 +30,7 @@ CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
CONFIG_TPL=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_NVEDIT_EFI=y
CONFIG_CMD_DFU=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
@ -38,6 +39,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_ROCKUSB=y
CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_EFIDEBUG=y
CONFIG_CMD_TIME=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
@ -90,9 +92,5 @@ CONFIG_DISPLAY_ROCKCHIP_HDMI=y
CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_CMD_NVEDIT_EFI=y
CONFIG_CMD_EFIDEBUG=y
CONFIG_TOOLS_MKEFICAPSULE=y
CONFIG_HEXDUMP=y
CONFIG_EFI_CAPSULE_ON_DISK=y
CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y

View File

@ -30,6 +30,7 @@ CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
CONFIG_TPL=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_NVEDIT_EFI=y
CONFIG_CMD_DFU=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
@ -38,6 +39,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_ROCKUSB=y
CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_EFIDEBUG=y
CONFIG_CMD_TIME=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
@ -90,9 +92,5 @@ CONFIG_DISPLAY_ROCKCHIP_HDMI=y
CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_CMD_NVEDIT_EFI=y
CONFIG_CMD_EFIDEBUG=y
CONFIG_TOOLS_MKEFICAPSULE=y
CONFIG_HEXDUMP=y
CONFIG_EFI_CAPSULE_ON_DISK=y
CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y

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@ -101,6 +101,7 @@ CONFIG_BOOTP_SEND_HOSTNAME=y
CONFIG_NETCONSOLE=y
CONFIG_IP_DEFRAG=y
CONFIG_BOOTP_SERVERIP=y
CONFIG_IPV6=y
CONFIG_DM_DMA=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
@ -258,4 +259,3 @@ CONFIG_FWU_MULTI_BANK_UPDATE=y
CONFIG_UNIT_TEST=y
CONFIG_UT_TIME=y
CONFIG_UT_DM=y
CONFIG_IPV6=y

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@ -135,6 +135,7 @@ CONFIG_BOOTP_SEND_HOSTNAME=y
CONFIG_NETCONSOLE=y
CONFIG_IP_DEFRAG=y
CONFIG_BOOTP_SERVERIP=y
CONFIG_IPV6=y
CONFIG_DM_DMA=y
CONFIG_DEVRES=y
CONFIG_DEBUG_DEVRES=y
@ -333,4 +334,3 @@ CONFIG_TEST_FDTDEC=y
CONFIG_UNIT_TEST=y
CONFIG_UT_TIME=y
CONFIG_UT_DM=y
CONFIG_IPV6=y

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@ -78,6 +78,7 @@ CONFIG_BOOTP_SEND_HOSTNAME=y
CONFIG_NETCONSOLE=y
CONFIG_IP_DEFRAG=y
CONFIG_BOOTP_SERVERIP=y
CONFIG_IPV6=y
CONFIG_DM_DMA=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
@ -216,4 +217,3 @@ CONFIG_EFI_CAPSULE_FIRMWARE_FIT=y
CONFIG_UNIT_TEST=y
CONFIG_UT_TIME=y
CONFIG_UT_DM=y
CONFIG_IPV6=y

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@ -72,10 +72,8 @@ CONFIG_CMD_CLK=y
CONFIG_CMD_DFU=y
CONFIG_CMD_FUSE=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_MTD=y
CONFIG_CMD_REMOTEPROC=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
@ -110,9 +108,6 @@ CONFIG_STM32_ADC=y
CONFIG_SPL_BLOCK_CACHE=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_SYS_BOOTCOUNT_MAGIC=0xB0C40000
CONFIG_DFU_MMC=y
CONFIG_DFU_MTD=y
CONFIG_DFU_RAM=y
CONFIG_GPIO_HOG=y
CONFIG_DM_HWSPINLOCK=y
CONFIG_HWSPINLOCK_STM32=y

View File

@ -70,10 +70,8 @@ CONFIG_CMD_CLK=y
CONFIG_CMD_DFU=y
CONFIG_CMD_FUSE=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_MTD=y
CONFIG_CMD_REMOTEPROC=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
@ -107,9 +105,6 @@ CONFIG_STM32_ADC=y
CONFIG_SPL_BLOCK_CACHE=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_SYS_BOOTCOUNT_MAGIC=0xB0C40000
CONFIG_DFU_MMC=y
CONFIG_DFU_MTD=y
CONFIG_DFU_RAM=y
CONFIG_GPIO_HOG=y
CONFIG_DM_HWSPINLOCK=y
CONFIG_HWSPINLOCK_STM32=y

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@ -69,6 +69,14 @@ quiet_cmd_sphinx = SPHINX $@ --> file://$(abspath $(BUILDDIR)/$3/$4)
htmldocs:
@+$(foreach var,$(SPHINXDIRS),$(call loop_cmd,sphinx,html,$(var),,$(var)))
texinfodocs:
@+$(foreach var,$(SPHINXDIRS),$(call loop_cmd,sphinx,texinfo,$(var),texinfo,$(var)))
# Note: the 'info' Make target is generated by sphinx itself when
# running the texinfodocs target defined above.
infodocs: texinfodocs
$(MAKE) -C $(BUILDDIR)/texinfo info
linkcheckdocs:
@$(foreach var,$(SPHINXDIRS),$(call loop_cmd,sphinx,linkcheck,$(var),,$(var)))
@ -109,6 +117,8 @@ cleandocs:
dochelp:
@echo ' U-Boot documentation in different formats from ReST:'
@echo ' htmldocs - HTML'
@echo ' texinfodocs - Texinfo'
@echo ' infodocs - Info'
@echo ' latexdocs - LaTeX'
@echo ' pdfdocs - PDF'
@echo ' epubdocs - EPUB'

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@ -7,7 +7,7 @@ QEMU PPC E500
QEMU for PPC supports a special 'ppce500' machine designed for emulation and
virtualization purposes. This document describes how to run U-Boot under it.
The QEMU ppce500 machine models a generic PowerPC E500 virtual machine with
The QEMU ppce500 machine models a generic PowerPC e500 virtual machine with
support for the VirtIO standard networking device connected to the built-in
PCI host controller. Some common devices in the CCSBAR space are modeled,
including MPIC, 16550A UART devices, GPIO, I2C and PCI host controller with
@ -39,6 +39,7 @@ embedded DTB created by QEMU reflects the new setting.
Both qemu-system-ppc and qemu-system-ppc64 provide emulation for the following
32-bit PowerPC CPUs:
* e500v1
* e500v2
* e500mc
@ -61,8 +62,9 @@ When U-Boot boots, you will notice the following::
This is because we only specified a core name to QEMU and it does not have a
meaningful SVR value which represents an actual SoC that integrates such core.
You can specify a real world SoC device that QEMU has built-in support but all
these SoCs are e500v2 based MPC85xx series, hence you cannot test anything
built for P4080 (e500mc), P5020 (e5500) and T2080 (e6500).
these SoCs are e500v1/e500v2 based MPC85xx series, hence you cannot test anything
built for P10xx/P2010/P2020 (e500v2), P204x/P304x/P40xx (e500mc), P50xx/T10xx (e5500)
and T208x/T4080/T4160/T4240 (e6500).
By default a VirtIO standard PCI networking device is connected as an ethernet
interface at PCI address 0.1.0, but we can switch that to an e1000 NIC by::

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@ -1,8 +1,11 @@
.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
.. sectionauthor:: Tom Rini <trini@konsulko.com>
AM335x Generation
=================
Summary
=======
-------
This document covers various features of the `am335x_evm` default
configuration, some of the related defconfigs, and how to enable hardware

View File

@ -1,8 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
.. sectionauthor:: Vignesh Raghavendra <vigneshr@ti.com>
Texas Instruments AM62 Platforms
================================
AM62 Platforms
===============
Introduction:
-------------

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@ -1,11 +1,10 @@
.. SPDX-License-Identifier: GPL-2.0+
Texas Instruments
=================
#################
.. toctree::
:maxdepth: 2
am335x_evm
j721e_evm
am62x_sk
k3

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@ -1,8 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
.. sectionauthor:: Lokesh Vutla <lokeshvutla@ti.com>
Texas Instruments K3 Platforms
==============================
J721E Platforms
===============
Introduction:
-------------

274
doc/board/ti/k3.rst Normal file
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@ -0,0 +1,274 @@
.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
.. sectionauthor:: Bryan Brattlof <bb@ti.com>
K3 Generation
=============
Summary
-------
Texas Instrument's K3 family of SoCs utilize a heterogeneous multicore
and highly integrated device architecture targeted to maximize
performance and power efficiency for a wide range of industrial,
automotive and other broad market segments.
Typically the processing cores and the peripherals for these devices are
partitioned into three functional domains to provide ultra-low power
modes as well as accommodating application and industrial safety systems
on the same SoC. These functional domains are typically called the:
* Wakeup (WKUP) domain
* Micro-controller (MCU) domain
* Main domain
For a more detailed view of what peripherals are attached to each
domain, consult the device specific documentation.
K3 Based SoCs
-------------
.. toctree::
:maxdepth: 1
j721e_evm
am62x_sk
Boot Flow Overview
------------------
For all K3 SoCs the first core started will be inside the Security
Management Subsystem (SMS) which will secure the device and start a core
in the wakeup domain to run the ROM code. ROM will then initialize the
boot media needed to load the binaries packaged inside `tiboot3.bin`,
including a 32bit U-Boot SPL, (called the wakup SPL) that ROM will jump
to after it has finished loading everything into internal SRAM.
.. code-block:: text
| WKUP Domain
ROM -> WKUP SPL ->
The wakeup SPL, running on a wakeup domain core, will initialize DDR and
any peripherals needed load the larger binaries inside the `tispl.bin`
into DDR. Once loaded the wakeup SPL will start one of the 'big'
application cores inside the main domain to initialize the main domain,
starting with ARM Trusted Firmware (ATF), before moving on to start
OPTEE and the main domain's U-Boot SPL.
.. code-block:: text
| WKUP Domain | Main Domain ->
ROM -> WKUP SPL -> ATF -> OPTEE -> Main SPL
The main domain's SPL, running on a 64bit application core, has
virtually unlimited space (billions of bytes now that DDR is working) to
initialize even more peripherals needed to load in the `u-boot.img`
which loads more firmware into the micro-controller & wakeup domains and
finally prepare the main domain to run Linux.
.. code-block:: text
| WKUP Domain | Main Domain ->
ROM -> WKUP SPL -> ATF -> OPTEE -> Main SPL -> UBoot -> Linux
This is the typical boot flow for all K3 based SoCs, however this flow
offers quite a lot in the terms of flexibility, especially on High
Security (HS) SoCs.
Boot Flow Variations
^^^^^^^^^^^^^^^^^^^^
All K3 SoCs will generally use the above boot flow with two main
differences depending on the capabilities of the boot ROM and the number
of cores inside the device. These differences split the bootflow into
essentially 4 unique but very similar flows:
* Split binary with a combined firmware: (eg: AM65)
* Combined binary with a combined firmware: (eg: AM64)
* Split binary with a split firmware: (eg: J721E)
* Combined binary with a split firmware: (eg: AM62)
For devices that utilize the split binary approach, ROM is not capable
of loading the firmware into the SoC requiring the wakeup domain's
U-Boot SPL to load the firmware.
Devices with a split firmware will have two firmwares loaded into the
device at different times during the bootup process. TI's Foundational
Security (TIFS), needed to operate the Security Management Subsystem,
will either be loaded by ROM or the WKUP U-Boot SPL, then once the
wakeup U-Boot SPL has completed, the second Device Management (DM)
firmware can be loaded on the now free core in the wakeup domain.
For more information on the bootup process of your SoC, consult the
device specific boot flow documentation.
Software Sources
----------------
All scripts and code needed to build the `tiboot3.bin`, `tispl.bin` and
`u-boot.img` for all K3 SoCs can be located at the following places
online
* **Das U-Boot**
| **source:** https://source.denx.de/u-boot/u-boot.git
| **branch:** master
* **K3 Image Gen**
| **source:** https://git.ti.com/git/k3-image-gen/k3-image-gen.git
| **branch:** master
* **ARM Trusted Firmware (ATF)**
| **source:** https://github.com/ARM-software/arm-trusted-firmware.git
| **branch:** master
* **Open Portable Trusted Execution Environment (OPTEE)**
| **source:** https://github.com/OP-TEE/optee_os.git
| **branch:** master
* **TI Firmware (TIFS, DM, DSMC)**
| **source:** https://git.ti.com/git/processor-firmware/ti-linux-firmware.git
| **branch:** ti-linux-firmware
* **TI's Security Development Tools**
| **source:** https://git.ti.com/git/security-development-tools/core-secdev-k3.git
| **branch:** master
Build Procedure
---------------
Depending on the specifics of your device, you will need three or more
binaries to boot your SoC.
* `tiboot3.bin` (bootloader for the wakeup domain)
* `tispl.bin` (bootloader for the main domain)
* `u-boot.img`
During the bootup process, both the 32bit wakeup domain and the 64bit
main domains will be involved. This means everything inside the
`tiboot3.bin` running in the wakeup domain will need to be compiled for
32bit cores and most binaries in the `tispl.bin` will need to be
compiled for 64bit main domain CPU cores.
All of that to say you will need both a 32bit and 64bit cross compiler
(assuming you're using an x86 desktop)
.. code-block:: bash
export CC32=arm-linux-gnueabihf-
export CC64=aarch64-linux-gnu-
Building tiboot3.bin
^^^^^^^^^^^^^^^^^^^^^
1. To generate the U-Boot SPL for the wakeup domain, use the following
commands, substituting :code:`{SOC}` for the name of your device (eg:
am62x)
.. code-block:: bash
# inside u-boot source
make ARCH=arm O=build/wkup CROSS_COMPILE=$CC32 {SOC}_evm_r5_defconfig
make ARCH=arm O=build/wkup CROSS_COMPILE=$CC32
2. Next we will use the K3 Image Gen scripts to package the various
firmware and the wakeup UBoot SPL into the final `tiboot3.bin`
binary. (or the `sysfw.itb` if your device uses the split binary
flow)
.. code-block:: bash
# inside k3-image-gen source
make CROSS_COMPILE=$CC32 SOC={SOC} SOC_TYPE={hs,gp} \
TI_SECURE_DEV_PKG=<path/to/securit-development-tools> \
SYSFW_PATH=<path/to/ti-sysfw/ti-fs-firmware-{SOC}-{hs|gp}.bin> \
SYSFW_HS_INNER_CERT_PATH=<path/to/ti-sysfw/ti-fs-firmware-{SOC}-hs-cert.bin
For devices that use the *combined binary flow*, you will also need to
supply the location of the SPL we created in step 1 above, so it can be
packaged into the final `tiboot3.bin`.
.. code-block:: bash
SBL=<path/to/wakeup/u-boot-spl.bin>
At this point you should have all the needed binaries to boot the wakeup
domain of your K3 SoC.
**Combined Binary Boot Flow** (eg: am62x, am64x, ... )
`k3-image-gen/tiboot3-{SOC}-{hs,gp}-evm.bin`
**Split Binary Boot Flow** (eg: j721e, am65x)
| `u-boot/build/wkup/tiboot3.bin`
| `k3-image-gen/sysfw-{SOC}-evm.bin`
.. note ::
It's important to rename the generated `tiboot3.bin` and `sysfw.itb`
to match exactly `tiboot3.bin` and `sysfw.itb` as ROM and the wakeup
UBoot SPL will only look for and load the files with these names.
Building tispl.bin
^^^^^^^^^^^^^^^^^^^
The `tispl.bin` is a standard fitImage combining the firmware need for
the main domain to function properly as well as Device Management (DM)
firmware if your device using a split firmware.
3. We will first need ATF, as it's the first thing to run on the 'big'
application cores on the main domain.
.. code-block:: bash
# inside arm-trusted-firmware source
make CROSS_COMPILE=$CC64 ARCH=aarch64 PLAT=k3 \
TARGET_BOARD={lite|generic} \
SPD=opteed \
Typically all `j7*` devices will use `TARGET_BOARD=generic` while all
Sitara (`am6*`) devices use the `lite` option.
4. The Open Portable Trusted Execution Environment (OPTEE) is designed
to run as a companion to a non-secure Linux kernel for Cortex-A cores
using the TrustZone technology built into the core.
.. code-block:: bash
# inside optee_os source
make CROSS_COMPILE=$CC32 CROSS_COMPILE64=$CC64 \
PLATFORM=k3 CFG_ARM64_core=y
5. Finally, after ATF has initialized the main domain and OPTEE has
finished, we can jump back into U-Boot again, this time running on a
64bit core in the main domain.
.. code-block:: bash
# inside u-boot source
make ARCH=arm O=build/main CROSS_COMPILE=$CC64 {SOC}_evm_a{53,72}_defconfig
make ARCH=arm O=build/main CROSS_COMPILE=$CC64 \
ATF=<path/to/atf/bl31.bin \
TEE=<path/to/optee/tee-pager_v2.bin
If your device uses a split firmware, you will also need to supply the
path to the Device Management (DM) Firmware to be included in the final
`tispl.bin` binary
.. code-block:: bash
DM=<path/to/ti-linux-firmware/ti-dm/ipc_echo_testb_mcu1_0_release_strip.xer5f>
At this point you should have every binary needed initialize both the
wakeup and main domain and to boot to the U-Boot prompt
**Main Domain Bootloader**
| `u-boot/build/main/tispl.bin`
| `u-boot/build/main/u-boot.img`

View File

@ -449,7 +449,7 @@ for fn in os.listdir('.'):
# One entry per manual page. List of tuples
# (source start file, name, description, authors, manual section).
man_pages = [
(master_doc, 'dasuboot', 'The U-Boot Documentation',
(master_doc, 'u-boot', 'The U-Boot Documentation',
[author], 1)
]
@ -463,8 +463,8 @@ man_pages = [
# (source start file, target name, title, author,
# dir menu entry, description, category)
texinfo_documents = [
(master_doc, 'DasUBoot', 'The U-Boot Documentation',
author, 'DasUBoot', 'One line description of project.',
(master_doc, 'u-boot', 'The U-Boot Documentation',
author, 'U-Boot', 'Boot loader for embedded systems',
'Miscellaneous'),
]

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Release Statistics for U-Boot v1.3.0
====================================
* Processed 1153 csets from 102 developers
* Processed 1153 changesets from 102 developers
* 38 employers found

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Release Statistics for U-Boot v1.3.1
====================================
* Processed 40 csets from 5 developers
* Processed 40 changesets from 5 developers
* 5 employers found

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@ -3,7 +3,7 @@
Release Statistics for U-Boot v1.3.2
====================================
* Processed 744 csets from 79 developers
* Processed 744 changesets from 79 developers
* 38 employers found

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Release Statistics for U-Boot v1.3.3
====================================
* Processed 646 csets from 75 developers
* Processed 646 changesets from 75 developers
* 38 employers found

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Release Statistics for U-Boot v1.3.4
====================================
* Processed 511 csets from 86 developers
* Processed 511 changesets from 86 developers
* 46 employers found

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Release Statistics for U-Boot v2008.10
======================================
* Processed 2498 csets from 174 developers
* Processed 2498 changesets from 174 developers
* 85 employers found

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Release Statistics for U-Boot v2009.01
======================================
* Processed 464 csets from 69 developers
* Processed 464 changesets from 69 developers
* 33 employers found

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Release Statistics for U-Boot v2009.03
======================================
* Processed 489 csets from 90 developers
* Processed 489 changesets from 90 developers
* 46 employers found

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Release Statistics for U-Boot v2009.06
======================================
* Processed 433 csets from 74 developers
* Processed 433 changesets from 74 developers
* 27 employers found

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Release Statistics for U-Boot v2009.08
======================================
* Processed 657 csets from 96 developers
* Processed 657 changesets from 96 developers
* 35 employers found

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@ -3,7 +3,7 @@
Release Statistics for U-Boot v2009.11
======================================
* Processed 531 csets from 90 developers
* Processed 531 changesets from 90 developers
* 39 employers found

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@ -3,7 +3,7 @@
Release Statistics for U-Boot v2010.03
======================================
* Processed 468 csets from 92 developers
* Processed 468 changesets from 92 developers
* 29 employers found

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Release Statistics for U-Boot v2010.06
======================================
* Processed 402 csets from 100 developers
* Processed 402 changesets from 100 developers
* 31 employers found

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Release Statistics for U-Boot v2010.09
======================================
* Processed 402 csets from 100 developers
* Processed 402 changesets from 100 developers
* 31 employers found

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Release Statistics for U-Boot v2010.12
======================================
* Processed 777 csets from 111 developers
* Processed 777 changesets from 111 developers
* 31 employers found

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Release Statistics for U-Boot v2011.03
======================================
* Processed 451 csets from 80 developers
* Processed 451 changesets from 80 developers
* 25 employers found

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Release Statistics for U-Boot v2011.06
======================================
* Processed 636 csets from 134 developers
* Processed 636 changesets from 134 developers
* 30 employers found

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Release Statistics for U-Boot v2011.09
======================================
* Processed 645 csets from 120 developers
* Processed 645 changesets from 120 developers
* 30 employers found

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Release Statistics for U-Boot v2011.12
======================================
* Processed 1530 csets from 146 developers
* Processed 1530 changesets from 146 developers
* 34 employers found

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@ -3,7 +3,7 @@
Release Statistics for U-Boot v2012.04
======================================
* Processed 773 csets from 126 developers
* Processed 773 changesets from 126 developers
* 36 employers found

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@ -3,7 +3,7 @@
Release Statistics for U-Boot v2012.07
======================================
* Processed 775 csets from 114 developers
* Processed 775 changesets from 114 developers
* 29 employers found

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Release Statistics for U-Boot v2012.12
======================================
* Processed 925 csets from 134 developers
* Processed 925 changesets from 134 developers
* 31 employers found

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@ -3,7 +3,7 @@
Release Statistics for U-Boot v2013.07
======================================
* Processed 948 csets from 162 developers
* Processed 948 changesets from 162 developers
* 30 employers found

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Release Statistics for U-Boot v2013.10
======================================
* Processed 710 csets from 135 developers
* Processed 710 changesets from 135 developers
* 28 employers found

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Release Statistics for U-Boot v2014.01
======================================
* Processed 980 csets from 154 developers
* Processed 980 changesets from 154 developers
* 31 employers found

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Release Statistics for U-Boot v2014.04
======================================
* Processed 769 csets from 109 developers
* Processed 769 changesets from 109 developers
* 26 employers found

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Release Statistics for U-Boot v2014.07
======================================
* Processed 1074 csets from 146 developers
* Processed 1074 changesets from 146 developers
* 30 employers found

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Release Statistics for U-Boot v2014.10
======================================
* Processed 1111 csets from 145 developers
* Processed 1111 changesets from 145 developers
* 24 employers found

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@ -3,7 +3,7 @@
Release Statistics for U-Boot v2015.01
======================================
* Processed 1588 csets from 162 developers
* Processed 1588 changesets from 162 developers
* 35 employers found

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Release Statistics for U-Boot v2015.04
======================================
* Processed 1585 csets from 169 developers
* Processed 1585 changesets from 169 developers
* 36 employers found

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Release Statistics for U-Boot v2015.07
======================================
* Processed 1563 csets from 156 developers
* Processed 1563 changesets from 156 developers
* 28 employers found

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Release Statistics for U-Boot v2015.10
======================================
* Processed 2069 csets from 182 developers
* Processed 2069 changesets from 182 developers
* 32 employers found

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Release Statistics for U-Boot v2016.01
======================================
* Processed 1513 csets from 149 developers
* Processed 1513 changesets from 149 developers
* 33 employers found

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Release Statistics for U-Boot v2016.03
======================================
* Processed 1375 csets from 126 developers
* Processed 1375 changesets from 126 developers
* 26 employers found

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Release Statistics for U-Boot v2016.05
======================================
* Processed 1043 csets from 133 developers
* Processed 1043 changesets from 133 developers
* 23 employers found

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Release Statistics for U-Boot v2016.07
======================================
* Processed 1078 csets from 133 developers
* Processed 1078 changesets from 133 developers
* 27 employers found

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@ -3,7 +3,7 @@
Release Statistics for U-Boot v2016.09
======================================
* Processed 987 csets from 129 developers
* Processed 987 changesets from 129 developers
* 30 employers found

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@ -3,7 +3,7 @@
Release Statistics for U-Boot v2016.11
======================================
* Processed 1031 csets from 114 developers
* Processed 1031 changesets from 114 developers
* 26 employers found

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@ -3,7 +3,7 @@
Release Statistics for U-Boot v2017.01
======================================
* Processed 883 csets from 137 developers
* Processed 883 changesets from 137 developers
* 29 employers found

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@ -3,7 +3,7 @@
Release Statistics for U-Boot v2017.03
======================================
* Processed 664 csets from 126 developers
* Processed 664 changesets from 126 developers
* 29 employers found

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@ -3,7 +3,7 @@
Release Statistics for U-Boot v2017.05
======================================
* Processed 915 csets from 139 developers
* Processed 915 changesets from 139 developers
* 29 employers found

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@ -3,7 +3,7 @@
Release Statistics for U-Boot v2017.07
======================================
* Processed 1371 csets from 129 developers
* Processed 1371 changesets from 129 developers
* 31 employers found

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@ -3,7 +3,7 @@
Release Statistics for U-Boot v2017.09
======================================
* Processed 1308 csets from 130 developers
* Processed 1308 changesets from 130 developers
* 27 employers found

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@ -3,7 +3,7 @@
Release Statistics for U-Boot v2017.11
======================================
* Processed 989 csets from 123 developers
* Processed 989 changesets from 123 developers
* 28 employers found

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@ -3,7 +3,7 @@
Release Statistics for U-Boot v2018.01
======================================
* Processed 785 csets from 132 developers
* Processed 785 changesets from 132 developers
* 32 employers found

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@ -3,7 +3,7 @@
Release Statistics for U-Boot v2018.03
======================================
* Processed 1193 csets from 151 developers
* Processed 1193 changesets from 151 developers
* 30 employers found

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@ -3,7 +3,7 @@
Release Statistics for U-Boot v2018.05
======================================
* Processed 977 csets from 128 developers
* Processed 977 changesets from 128 developers
* 26 employers found

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@ -3,7 +3,7 @@
Release Statistics for U-Boot v2018.07
======================================
* Processed 1055 csets from 141 developers
* Processed 1055 changesets from 141 developers
* 30 employers found

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@ -3,7 +3,7 @@
Release Statistics for U-Boot v2018.09
======================================
* Processed 983 csets from 138 developers
* Processed 983 changesets from 138 developers
* 32 employers found

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@ -3,7 +3,7 @@
Release Statistics for U-Boot v2018.11
======================================
* Processed 1105 csets from 130 developers
* Processed 1105 changesets from 130 developers
* 31 employers found

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@ -3,7 +3,7 @@
Release Statistics for U-Boot v2019.01
======================================
* Processed 1149 csets from 140 developers
* Processed 1149 changesets from 140 developers
* 29 employers found

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@ -3,7 +3,7 @@
Release Statistics for U-Boot v2019.04
======================================
* Processed 1193 csets from 182 developers
* Processed 1193 changesets from 182 developers
* 28 employers found

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@ -3,7 +3,7 @@
Release Statistics for U-Boot v2019.07
======================================
* Processed 2047 csets from 215 developers
* Processed 2047 changesets from 215 developers
* 29 employers found

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@ -3,7 +3,7 @@
Release Statistics for U-Boot v2019.10
======================================
* Processed 2007 csets from 190 developers
* Processed 2007 changesets from 190 developers
* 32 employers found

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@ -3,7 +3,7 @@
Release Statistics for U-Boot v2020.01
======================================
* Processed 1826 csets from 192 developers
* Processed 1826 changesets from 192 developers
* 30 employers found

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@ -3,7 +3,7 @@
Release Statistics for U-Boot v2020.04
======================================
* Processed 1639 csets from 189 developers
* Processed 1639 changesets from 189 developers
* 30 employers found

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@ -3,7 +3,7 @@
Release Statistics for U-Boot v2020.07
======================================
* Processed 1918 csets from 203 developers
* Processed 1918 changesets from 203 developers
* 32 employers found

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@ -3,7 +3,7 @@
Release Statistics for U-Boot v2020.10
======================================
* Processed 2048 csets from 227 developers
* Processed 2048 changesets from 227 developers
* 31 employers found

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@ -3,7 +3,7 @@
Release Statistics for U-Boot v2021.01
======================================
* Processed 1694 csets from 163 developers
* Processed 1694 changesets from 163 developers
* 27 employers found

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@ -3,7 +3,7 @@
Release Statistics for U-Boot v2021.04
======================================
* Processed 1675 csets from 194 developers
* Processed 1675 changesets from 194 developers
* 28 employers found

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@ -3,7 +3,7 @@
Release Statistics for U-Boot v2021.07
======================================
* Processed 1730 csets from 187 developers
* Processed 1730 changesets from 187 developers
* 30 employers found

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@ -3,7 +3,7 @@
Release Statistics for U-Boot v2021.10
======================================
* Processed 1509 csets from 176 developers
* Processed 1509 changesets from 176 developers
* 28 employers found

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@ -3,7 +3,7 @@
Release Statistics for U-Boot v2022.01
======================================
* Processed 1417 csets from 164 developers
* Processed 1417 changesets from 164 developers
* 29 employers found

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@ -3,7 +3,7 @@
Release Statistics for U-Boot v2022.04
======================================
* Processed 1555 csets from 193 developers
* Processed 1555 changesets from 193 developers
* 27 employers found

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@ -3,7 +3,7 @@
Release Statistics for U-Boot v2022.07
======================================
* Processed 1696 csets from 183 developers
* Processed 1696 changesets from 183 developers
* 27 employers found

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