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arm: zynq: fpga: Added Kconfig support for CONFIG_FPGA_ZYNQPL

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This patch added Kconfig support for CONFIG_FPGA_ZYNQPL and migrates the
values over to the defconfigs.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
This commit is contained in:
Vipul Kumar 2018-02-16 18:02:51 +05:30 committed by Tom Rini
parent f415834608
commit 3990c9d627
19 changed files with 24 additions and 2 deletions
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1
configs/syzygy_hub_defconfig
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@ -33,6 +33,7 @@ CONFIG_CMD_EXT4_WRITE=y
CONFIG_OF_EMBED=y CONFIG_OF_EMBED=y
CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_FPGA_XILINX=y CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQPL=y
CONFIG_DM_GPIO=y CONFIG_DM_GPIO=y
CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_MMC_SDHCI_ZYNQ=y

1
configs/topic_miami_defconfig
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@ -30,6 +30,7 @@ CONFIG_OF_EMBED=y
CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DFU_RAM=y CONFIG_DFU_RAM=y
CONFIG_FPGA_XILINX=y CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQPL=y
CONFIG_DM_GPIO=y CONFIG_DM_GPIO=y
CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_MMC_SDHCI_ZYNQ=y

1
configs/topic_miamilite_defconfig
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@ -30,6 +30,7 @@ CONFIG_OF_EMBED=y
CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DFU_RAM=y CONFIG_DFU_RAM=y
CONFIG_FPGA_XILINX=y CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQPL=y
CONFIG_DM_GPIO=y CONFIG_DM_GPIO=y
CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_MMC_SDHCI_ZYNQ=y

1
configs/topic_miamiplus_defconfig
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@ -28,6 +28,7 @@ CONFIG_OF_EMBED=y
CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DFU_RAM=y CONFIG_DFU_RAM=y
CONFIG_FPGA_XILINX=y CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQPL=y
CONFIG_DM_GPIO=y CONFIG_DM_GPIO=y
CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_MMC_SDHCI_ZYNQ=y

1
configs/zynq_cc108_defconfig
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@ -26,6 +26,7 @@ CONFIG_CMD_EXT4_WRITE=y
CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_FPGA_XILINX=y CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQPL=y
CONFIG_DM_GPIO=y CONFIG_DM_GPIO=y
CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_MMC_SDHCI_ZYNQ=y

1
configs/zynq_microzed_defconfig
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@ -34,6 +34,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DFU_MMC=y CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y CONFIG_DFU_RAM=y
CONFIG_FPGA_XILINX=y CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQPL=y
CONFIG_DM_GPIO=y CONFIG_DM_GPIO=y
CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_MMC_SDHCI_ZYNQ=y

1
configs/zynq_picozed_defconfig
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@ -29,6 +29,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DFU_MMC=y CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y CONFIG_DFU_RAM=y
CONFIG_FPGA_XILINX=y CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQPL=y
CONFIG_DM_GPIO=y CONFIG_DM_GPIO=y
CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_MMC_SDHCI_ZYNQ=y

1
configs/zynq_z_turn_defconfig
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@ -30,6 +30,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DFU_MMC=y CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y CONFIG_DFU_RAM=y
CONFIG_FPGA_XILINX=y CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQPL=y
CONFIG_DM_GPIO=y CONFIG_DM_GPIO=y
CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_MMC_SDHCI_ZYNQ=y

1
configs/zynq_zc702_defconfig
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@ -39,6 +39,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DFU_MMC=y CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y CONFIG_DFU_RAM=y
CONFIG_FPGA_XILINX=y CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQPL=y
CONFIG_DM_GPIO=y CONFIG_DM_GPIO=y
CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_MMC_SDHCI_ZYNQ=y

1
configs/zynq_zc706_defconfig
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@ -39,6 +39,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DFU_MMC=y CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y CONFIG_DFU_RAM=y
CONFIG_FPGA_XILINX=y CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQPL=y
CONFIG_DM_GPIO=y CONFIG_DM_GPIO=y
CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_MMC_SDHCI_ZYNQ=y

1
configs/zynq_zc770_xm010_defconfig
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@ -34,6 +34,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_FPGA_XILINX=y CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQPL=y
CONFIG_DM_GPIO=y CONFIG_DM_GPIO=y
CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_MMC_SDHCI_ZYNQ=y

1
configs/zynq_zc770_xm011_defconfig
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@ -32,6 +32,7 @@ CONFIG_CMD_CACHE=y
CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_BLK=y CONFIG_BLK=y
CONFIG_FPGA_XILINX=y CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQPL=y
CONFIG_DM_GPIO=y CONFIG_DM_GPIO=y
# CONFIG_MMC is not set # CONFIG_MMC is not set
CONFIG_NAND=y CONFIG_NAND=y

1
configs/zynq_zc770_xm011_x16_defconfig
View File

@ -32,6 +32,7 @@ CONFIG_CMD_CACHE=y
CONFIG_OF_EMBED=y CONFIG_OF_EMBED=y
CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_FPGA_XILINX=y CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQPL=y
CONFIG_DM_GPIO=y CONFIG_DM_GPIO=y
# CONFIG_MMC is not set # CONFIG_MMC is not set
CONFIG_DM_MMC=y CONFIG_DM_MMC=y

1
configs/zynq_zc770_xm012_defconfig
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@ -32,6 +32,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_BLK=y CONFIG_BLK=y
CONFIG_FPGA_XILINX=y CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQPL=y
CONFIG_DM_GPIO=y CONFIG_DM_GPIO=y
# CONFIG_MMC is not set # CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_NOR_FLASH=y

1
configs/zynq_zc770_xm013_defconfig
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@ -31,6 +31,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_BLK=y CONFIG_BLK=y
CONFIG_FPGA_XILINX=y CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQPL=y
CONFIG_DM_GPIO=y CONFIG_DM_GPIO=y
# CONFIG_MMC is not set # CONFIG_MMC is not set
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y

1
configs/zynq_zed_defconfig
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@ -34,6 +34,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DFU_MMC=y CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y CONFIG_DFU_RAM=y
CONFIG_FPGA_XILINX=y CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQPL=y
CONFIG_DM_GPIO=y CONFIG_DM_GPIO=y
CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_MMC_SDHCI_ZYNQ=y

1
configs/zynq_zybo_defconfig
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@ -38,6 +38,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DFU_MMC=y CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y CONFIG_DFU_RAM=y
CONFIG_FPGA_XILINX=y CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQPL=y
CONFIG_DM_GPIO=y CONFIG_DM_GPIO=y
CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_MMC_SDHCI_ZYNQ=y

7
drivers/fpga/Kconfig
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@ -50,4 +50,11 @@ config FPGA_SPARTAN3
help help
Enable Spartan3 FPGA driver for loading in BIT format. Enable Spartan3 FPGA driver for loading in BIT format.
config FPGA_ZYNQPL
bool "Enable Xilinx FPGA for Zynq"
depends on ARCH_ZYNQ
help
Enable FPGA driver for loading bitstream in BIT and BIN format
on Xilinx Zynq devices.
endmenu endmenu

2
include/configs/zynq-common.h
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@ -269,8 +269,6 @@
CONFIG_SYS_INIT_RAM_SIZE - \ CONFIG_SYS_INIT_RAM_SIZE - \
GENERATED_GBL_DATA_SIZE) GENERATED_GBL_DATA_SIZE)
/* Enable the PL to be downloaded */
#define CONFIG_FPGA_ZYNQPL
/* FIT support */ /* FIT support */
#define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */ #define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */