Convert CONFIG_SYS_CACHE_STASHING to Kconfig

This converts the following to Kconfig:
   CONFIG_SYS_CACHE_STASHING

Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini
2022-06-27 13:35:46 -04:00
parent 52686b8739
commit 38d091ac1d
50 changed files with 43 additions and 9 deletions

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@@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
CONFIG_SYS_FSL_CPC=y
CONFIG_SYS_CACHE_STASHING=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y
CONFIG_PCIE3=y

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@@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
CONFIG_SYS_FSL_CPC=y
CONFIG_SYS_CACHE_STASHING=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y
CONFIG_PCIE3=y

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@@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
CONFIG_SYS_FSL_CPC=y
CONFIG_SYS_CACHE_STASHING=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y
CONFIG_PCIE3=y

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@@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
CONFIG_SYS_FSL_CPC=y
CONFIG_SYS_CACHE_STASHING=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y
CONFIG_PCIE3=y

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@@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
CONFIG_SYS_FSL_CPC=y
CONFIG_SYS_CACHE_STASHING=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y
CONFIG_PCIE3=y

View File

@@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
CONFIG_SYS_FSL_CPC=y
CONFIG_SYS_CACHE_STASHING=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y
CONFIG_PCIE3=y

View File

@@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
CONFIG_SYS_FSL_CPC=y
CONFIG_SYS_CACHE_STASHING=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y
CONFIG_PCIE3=y

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@@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
CONFIG_SYS_FSL_CPC=y
CONFIG_SYS_CACHE_STASHING=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y
CONFIG_PCIE3=y

View File

@@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
CONFIG_SYS_FSL_CPC=y
CONFIG_SYS_CACHE_STASHING=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y
CONFIG_PCIE3=y

View File

@@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
CONFIG_SYS_FSL_CPC=y
CONFIG_SYS_CACHE_STASHING=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y
CONFIG_PCIE3=y

View File

@@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
CONFIG_SYS_FSL_CPC=y
CONFIG_SYS_CACHE_STASHING=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y
CONFIG_PCIE3=y

View File

@@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
CONFIG_SYS_FSL_CPC=y
CONFIG_SYS_CACHE_STASHING=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y
CONFIG_PCIE3=y

View File

@@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
CONFIG_SYS_FSL_CPC=y
CONFIG_SYS_CACHE_STASHING=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y
CONFIG_PCIE3=y

View File

@@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
CONFIG_SYS_FSL_CPC=y
CONFIG_SYS_CACHE_STASHING=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y
CONFIG_PCIE3=y

View File

@@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
CONFIG_SYS_FSL_CPC=y
CONFIG_SYS_CACHE_STASHING=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y
CONFIG_PCIE3=y

View File

@@ -15,6 +15,7 @@ CONFIG_TARGET_T1024RDB=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
CONFIG_SYS_FSL_CPC=y
CONFIG_SYS_CACHE_STASHING=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_PCIE1=y

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@@ -16,6 +16,7 @@ CONFIG_TARGET_T1024RDB=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
CONFIG_SYS_FSL_CPC=y
CONFIG_SYS_CACHE_STASHING=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y

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@@ -18,6 +18,7 @@ CONFIG_TARGET_T1024RDB=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
CONFIG_SYS_FSL_CPC=y
CONFIG_SYS_CACHE_STASHING=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y

View File

@@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
CONFIG_SYS_FSL_CPC=y
CONFIG_SYS_CACHE_STASHING=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y
CONFIG_PCIE3=y

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@@ -14,6 +14,7 @@ CONFIG_TARGET_T1042D4RDB=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
CONFIG_SYS_FSL_CPC=y
CONFIG_SYS_CACHE_STASHING=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_PCIE1=y

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@@ -15,6 +15,7 @@ CONFIG_TARGET_T1042D4RDB=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
CONFIG_SYS_FSL_CPC=y
CONFIG_SYS_CACHE_STASHING=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y

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@@ -17,6 +17,7 @@ CONFIG_TARGET_T1042D4RDB=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
CONFIG_SYS_FSL_CPC=y
CONFIG_SYS_CACHE_STASHING=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y

View File

@@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
CONFIG_SYS_FSL_CPC=y
CONFIG_SYS_CACHE_STASHING=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y
CONFIG_PCIE3=y

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@@ -14,6 +14,7 @@ CONFIG_TARGET_T2080QDS=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
CONFIG_SYS_FSL_CPC=y
CONFIG_SYS_CACHE_STASHING=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_PCIE1=y

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@@ -15,6 +15,7 @@ CONFIG_TARGET_T2080QDS=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
CONFIG_SYS_FSL_CPC=y
CONFIG_SYS_CACHE_STASHING=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y

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@@ -8,6 +8,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
CONFIG_SYS_FSL_CPC=y
CONFIG_SYS_CACHE_STASHING=y
CONFIG_NXP_ESBC=y
CONFIG_BOOTSCRIPT_HDR_ADDR=0xee020000
CONFIG_PCIE1=y

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@@ -17,6 +17,7 @@ CONFIG_TARGET_T2080QDS=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
CONFIG_SYS_FSL_CPC=y
CONFIG_SYS_CACHE_STASHING=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y

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@@ -9,6 +9,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
CONFIG_SYS_FSL_CPC=y
CONFIG_SYS_CACHE_STASHING=y
CONFIG_SRIO_PCIE_BOOT_SLAVE=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y

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@@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
CONFIG_SYS_FSL_CPC=y
CONFIG_SYS_CACHE_STASHING=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y
CONFIG_PCIE3=y

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@@ -14,6 +14,7 @@ CONFIG_TARGET_T2080RDB=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
CONFIG_SYS_FSL_CPC=y
CONFIG_SYS_CACHE_STASHING=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_PCIE1=y

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@@ -15,6 +15,7 @@ CONFIG_TARGET_T2080RDB=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
CONFIG_SYS_FSL_CPC=y
CONFIG_SYS_CACHE_STASHING=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y

View File

@@ -17,6 +17,7 @@ CONFIG_TARGET_T2080RDB=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
CONFIG_SYS_FSL_CPC=y
CONFIG_SYS_CACHE_STASHING=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y

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@@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
CONFIG_SYS_FSL_CPC=y
CONFIG_SYS_CACHE_STASHING=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y
CONFIG_PCIE3=y

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@@ -14,6 +14,7 @@ CONFIG_TARGET_T2080RDB=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
CONFIG_SYS_FSL_CPC=y
CONFIG_SYS_CACHE_STASHING=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_T2080RDB_REV_D=y

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@@ -15,6 +15,7 @@ CONFIG_TARGET_T2080RDB=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
CONFIG_SYS_FSL_CPC=y
CONFIG_SYS_CACHE_STASHING=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_T2080RDB_REV_D=y
CONFIG_PCIE1=y

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@@ -17,6 +17,7 @@ CONFIG_TARGET_T2080RDB=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
CONFIG_SYS_FSL_CPC=y
CONFIG_SYS_CACHE_STASHING=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_T2080RDB_REV_D=y
CONFIG_PCIE1=y

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@@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
CONFIG_SYS_FSL_CPC=y
CONFIG_SYS_CACHE_STASHING=y
CONFIG_T2080RDB_REV_D=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y

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@@ -15,6 +15,7 @@ CONFIG_TARGET_T4240RDB=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
CONFIG_SYS_FSL_CPC=y
CONFIG_SYS_CACHE_STASHING=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y

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@@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
CONFIG_SYS_FSL_CPC=y
CONFIG_SYS_CACHE_STASHING=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y
CONFIG_PCIE3=y

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@@ -13,6 +13,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
CONFIG_SYS_FSL_CPC=y
CONFIG_SYS_CACHE_STASHING=y
# CONFIG_DEEP_SLEEP is not set
CONFIG_PCIE1=y
CONFIG_KM_DEF_NETDEV="eth2"