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powerpc : p1022ds : Enable p1022ds to start from eSPI with SPL

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Enable p1022ds to start from eSPI with SPL.

Signed-off-by: Ying Zhang <b40530@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
This commit is contained in:
Ying Zhang 2013-08-16 15:16:14 +08:00 committed by York Sun
parent fdf8529afc
commit 382ce7e909
2 changed files with 39 additions and 7 deletions
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10
board/freescale/p1022ds/spl.c
View File

@ -27,6 +27,7 @@
#include <i2c.h>
#include "../common/ngpixis.h"
#include <fsl_esdhc.h>
#include <spi_flash.h>
DECLARE_GLOBAL_DATA_PTR;
@ -53,6 +54,11 @@ void board_init_f(ulong bootflag)
setbits_be32(&gur->pmuxcr,
in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA);
#ifdef CONFIG_SPL_SPI_BOOT
/* Enable the SPI */
clrsetbits_8(&pixis->brdcfg0, PIXIS_ELBC_SPI_MASK, PIXIS_SPI);
#endif
/* Read back the register to synchronize the write. */
in_be32(&gur->pmuxcr);
@ -66,6 +72,8 @@ void board_init_f(ulong bootflag)
bus_clk / 16 / CONFIG_BAUDRATE);
#ifdef CONFIG_SPL_MMC_BOOT
puts("\nSD boot...\n");
#elif defined(CONFIG_SPL_SPI_BOOT)
puts("\nSPI Flash boot...\n");
#endif
/* copy code to RAM and jump to it - this should not return */
@ -106,5 +114,7 @@ void board_init_r(gd_t *gd, ulong dest_addr)
#ifdef CONFIG_SPL_MMC_BOOT
mmc_boot();
#elif defined(CONFIG_SPL_SPI_BOOT)
spi_boot();
#endif
}

36
include/configs/P1022DS.h
View File

@ -45,11 +45,33 @@
#endif
#ifdef CONFIG_SPIFLASH
#define CONFIG_RAMBOOT_SPIFLASH
#define CONFIG_SYS_RAMBOOT
#define CONFIG_SYS_EXTRA_ENV_RELOC
#define CONFIG_SYS_TEXT_BASE 0x11000000
#define CONFIG_RESET_VECTOR_ADDRESS 0x1107fffc
#define CONFIG_SPL
#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
#define CONFIG_SPL_ENV_SUPPORT
#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_SPI_SUPPORT
#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_FLASH_MINIMAL
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_I2C_SUPPORT
#define CONFIG_FSL_LAW /* Use common FSL init code */
#define CONFIG_SYS_TEXT_BASE 0x11001000
#define CONFIG_SPL_TEXT_BASE 0xf8f81000
#define CONFIG_SPL_PAD_TO 0x18000
#define CONFIG_SPL_MAX_SIZE (96 * 1024)
#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (512 << 10)
#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x11000000)
#define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x11000000)
#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (96 << 10)
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
#define CONFIG_SPL_SPI_BOOT
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SPL_COMMON_INIT_DDR
#endif
#endif
#define CONFIG_NAND_FSL_ELBC
@ -315,7 +337,7 @@
* Config the L2 Cache as L2 SRAM
*/
#if defined(CONFIG_SPL_BUILD)
#if defined(CONFIG_SDCARD)
#if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH)
#define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000
#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
#define CONFIG_SYS_L2_SIZE (256 << 10)
@ -559,7 +581,7 @@
/*
* Environment
*/
#ifdef CONFIG_RAMBOOT_SPIFLASH
#ifdef CONFIG_SPIFLASH
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_SPI_BUS 0
#define CONFIG_ENV_SPI_CS 0