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sf: Move flags macro's to spi_flash_params{} members

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This patch moves flags macro's to respective member position on
spi_flash_params{}, for better readabilty and finding the
respective member macro's easily.

Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
This commit is contained in:
Jagan Teki 2016-08-08 19:25:55 +05:30 committed by Jagan Teki
parent de0599284f
commit 3632c8e5ce
1 changed files with 10 additions and 13 deletions
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23
drivers/mtd/spi/sf_internal.h
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@ -20,19 +20,6 @@ enum spi_dual_flash {
SF_DUAL_PARALLEL_FLASH = BIT(1),
};
/* sf param flags */
enum {
SECT_4K = BIT(0),
E_FSR = BIT(1),
SST_WR = BIT(2),
WR_QPP = BIT(3),
RD_QUAD = BIT(4),
RD_DUAL = BIT(5),
RD_QUADIO = BIT(6),
RD_DUALIO = BIT(7),
};
#define RD_FULL RD_QUAD | RD_DUAL | RD_QUADIO | RD_DUALIO
enum spi_nor_option_flags {
SNOR_F_SST_WR = BIT(0),
SNOR_F_USE_FSR = BIT(1),
@ -133,7 +120,17 @@ struct spi_flash_params {
u16 ext_jedec;
u32 sector_size;
u32 nr_sectors;
u16 flags;
#define SECT_4K BIT(0)
#define E_FSR BIT(1)
#define SST_WR BIT(2)
#define WR_QPP BIT(3)
#define RD_QUAD BIT(4)
#define RD_DUAL BIT(5)
#define RD_QUADIO BIT(6)
#define RD_DUALIO BIT(7)
#define RD_FULL (RD_QUAD | RD_DUAL | RD_QUADIO | RD_DUALIO)
};
extern const struct spi_flash_params spi_flash_params_table[];