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ARM: rmobile: Fix CPGWPR Address define and Settings on Gen3

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This patch fixes the write-protect control of CPG.

Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
This commit is contained in:
Hiroyuki Yokoyama 2015-12-14 11:24:44 +09:00 committed by Marek Vasut
parent e3beca3a2f
commit 355683c35e
3 changed files with 6 additions and 6 deletions
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4
board/renesas/draak/draak.c
View File

@ -27,7 +27,7 @@
DECLARE_GLOBAL_DATA_PTR;
#define CPGWPCR 0xE6150904
#define CPGWPR 0xE615090C
#define CPGWPR 0xE6150900
#define CLK2MHZ(clk) (clk / 1000 / 1000)
void s_init(void)
@ -39,8 +39,8 @@ void s_init(void)
writel(0xA5A5A500, &rwdt->rwtcsra);
writel(0xA5A5A500, &swdt->swtcsra);
writel(0x5A5AFFFF, CPGWPR);
writel(0xA5A50000, CPGWPCR);
writel(0xFFFFFFFF, CPGWPR);
}
#define GSX_MSTP112 BIT(12) /* 3DG */

4
board/renesas/salvator-x/salvator-x.c
View File

@ -28,7 +28,7 @@
DECLARE_GLOBAL_DATA_PTR;
#define CPGWPCR 0xE6150904
#define CPGWPR 0xE615090C
#define CPGWPR 0xE6150900
#define CLK2MHZ(clk) (clk / 1000 / 1000)
void s_init(void)
@ -40,8 +40,8 @@ void s_init(void)
writel(0xA5A5A500, &rwdt->rwtcsra);
writel(0xA5A5A500, &swdt->swtcsra);
writel(0x5A5AFFFF, CPGWPR);
writel(0xA5A50000, CPGWPCR);
writel(0xFFFFFFFF, CPGWPR);
}
#define GSX_MSTP112 BIT(12) /* 3DG */

4
board/renesas/ulcb/ulcb.c
View File

@ -27,7 +27,7 @@
DECLARE_GLOBAL_DATA_PTR;
#define CPGWPCR 0xE6150904
#define CPGWPR 0xE615090C
#define CPGWPR 0xE6150900
#define CLK2MHZ(clk) (clk / 1000 / 1000)
void s_init(void)
@ -39,8 +39,8 @@ void s_init(void)
writel(0xA5A5A500, &rwdt->rwtcsra);
writel(0xA5A5A500, &swdt->swtcsra);
writel(0x5A5AFFFF, CPGWPR);
writel(0xA5A50000, CPGWPCR);
writel(0xFFFFFFFF, CPGWPR);
}
#define GSX_MSTP112 BIT(12) /* 3DG */