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sunxi: psci: Move entry address setting to separate function

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Currently we set the entry address in the psci_cpu_on function.
However R40 has a different register for this. This resulted in
an #ifdef / #else block in psci_cpu_on, which we avoided having
in the first place.

Move this part into a separate function, defined differently for
the R40 as opposed to the other single cluster platforms.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
This commit is contained in:
Chen-Yu Tsai
2017-06-07 15:11:49 +08:00
committed by Jagan Teki
parent 84580628b8
commit 3474827294
1 changed files with 18 additions and 7 deletions
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25
arch/arm/cpu/armv7/sunxi/psci.c
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@@ -118,6 +118,23 @@ static void __secure sunxi_power_switch(u32 *clamp, u32 *pwroff, bool on,
} }
} }
#ifdef CONFIG_MACH_SUN8I_R40
/* secondary core entry address is programmed differently on R40 */
static void __secure sunxi_set_entry_address(void *entry)
{
writel((u32)entry,
SUNXI_SRAMC_BASE + SUN8I_R40_SRAMC_SOFT_ENTRY_REG0);
}
#else
static void __secure sunxi_set_entry_address(void *entry)
{
struct sunxi_cpucfg_reg *cpucfg =
(struct sunxi_cpucfg_reg *)SUNXI_CPUCFG_BASE;
writel((u32)entry, &cpucfg->priv0);
}
#endif
#ifdef CONFIG_MACH_SUN7I #ifdef CONFIG_MACH_SUN7I
/* sun7i (A20) is different from other single cluster SoCs */ /* sun7i (A20) is different from other single cluster SoCs */
static void __secure sunxi_cpu_set_power(int __always_unused cpu, bool on) static void __secure sunxi_cpu_set_power(int __always_unused cpu, bool on)
@@ -236,13 +253,7 @@ int __secure psci_cpu_on(u32 __always_unused unused, u32 mpidr, u32 pc)
psci_save_target_pc(cpu, pc); psci_save_target_pc(cpu, pc);
/* Set secondary core power on PC */ /* Set secondary core power on PC */
#ifdef CONFIG_MACH_SUN8I_R40 sunxi_set_entry_address(&psci_cpu_entry);
/* secondary core entry address is programmed differently */
writel((u32)&psci_cpu_entry,
SUNXI_SRAMC_BASE + SUN8I_R40_SRAMC_SOFT_ENTRY_REG0);
#else
writel((u32)&psci_cpu_entry, &cpucfg->priv0);
#endif
/* Assert reset on target CPU */ /* Assert reset on target CPU */
writel(0, &cpucfg->cpu[cpu].rst); writel(0, &cpucfg->cpu[cpu].rst);