arm64: zynqmp: Use power header in zynqmp.dtsi
Use power header and add power-domains property. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
Michal Simek
parent
b07e97b4ba
commit
332996ce18
@ -12,6 +12,7 @@
|
||||
* the License, or (at your option) any later version.
|
||||
*/
|
||||
|
||||
#include <dt-bindings/power/xlnx-zynqmp-power.h>
|
||||
#include <dt-bindings/reset/xlnx-zynqmp-resets.h>
|
||||
|
||||
/ {
|
||||
@ -286,6 +287,7 @@
|
||||
interrupt-parent = <&gic>;
|
||||
tx-fifo-depth = <0x40>;
|
||||
rx-fifo-depth = <0x40>;
|
||||
power-domains = <&zynqmp_firmware PD_CAN_0>;
|
||||
};
|
||||
|
||||
can1: can@ff070000 {
|
||||
@ -297,6 +299,7 @@
|
||||
interrupt-parent = <&gic>;
|
||||
tx-fifo-depth = <0x40>;
|
||||
rx-fifo-depth = <0x40>;
|
||||
power-domains = <&zynqmp_firmware PD_CAN_1>;
|
||||
};
|
||||
|
||||
cci: cci@fd6e0000 {
|
||||
@ -329,6 +332,7 @@
|
||||
xlnx,bus-width = <128>;
|
||||
#stream-id-cells = <1>;
|
||||
iommus = <&smmu 0x14e8>;
|
||||
power-domains = <&zynqmp_firmware PD_GDMA>;
|
||||
};
|
||||
|
||||
fpd_dma_chan2: dma@fd510000 {
|
||||
@ -341,6 +345,7 @@
|
||||
xlnx,bus-width = <128>;
|
||||
#stream-id-cells = <1>;
|
||||
iommus = <&smmu 0x14e9>;
|
||||
power-domains = <&zynqmp_firmware PD_GDMA>;
|
||||
};
|
||||
|
||||
fpd_dma_chan3: dma@fd520000 {
|
||||
@ -353,6 +358,7 @@
|
||||
xlnx,bus-width = <128>;
|
||||
#stream-id-cells = <1>;
|
||||
iommus = <&smmu 0x14ea>;
|
||||
power-domains = <&zynqmp_firmware PD_GDMA>;
|
||||
};
|
||||
|
||||
fpd_dma_chan4: dma@fd530000 {
|
||||
@ -365,6 +371,7 @@
|
||||
xlnx,bus-width = <128>;
|
||||
#stream-id-cells = <1>;
|
||||
iommus = <&smmu 0x14eb>;
|
||||
power-domains = <&zynqmp_firmware PD_GDMA>;
|
||||
};
|
||||
|
||||
fpd_dma_chan5: dma@fd540000 {
|
||||
@ -377,6 +384,7 @@
|
||||
xlnx,bus-width = <128>;
|
||||
#stream-id-cells = <1>;
|
||||
iommus = <&smmu 0x14ec>;
|
||||
power-domains = <&zynqmp_firmware PD_GDMA>;
|
||||
};
|
||||
|
||||
fpd_dma_chan6: dma@fd550000 {
|
||||
@ -389,6 +397,7 @@
|
||||
xlnx,bus-width = <128>;
|
||||
#stream-id-cells = <1>;
|
||||
iommus = <&smmu 0x14ed>;
|
||||
power-domains = <&zynqmp_firmware PD_GDMA>;
|
||||
};
|
||||
|
||||
fpd_dma_chan7: dma@fd560000 {
|
||||
@ -401,6 +410,7 @@
|
||||
xlnx,bus-width = <128>;
|
||||
#stream-id-cells = <1>;
|
||||
iommus = <&smmu 0x14ee>;
|
||||
power-domains = <&zynqmp_firmware PD_GDMA>;
|
||||
};
|
||||
|
||||
fpd_dma_chan8: dma@fd570000 {
|
||||
@ -413,6 +423,7 @@
|
||||
xlnx,bus-width = <128>;
|
||||
#stream-id-cells = <1>;
|
||||
iommus = <&smmu 0x14ef>;
|
||||
power-domains = <&zynqmp_firmware PD_GDMA>;
|
||||
};
|
||||
|
||||
gpu: gpu@fd4b0000 {
|
||||
@ -423,6 +434,7 @@
|
||||
interrupts = <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>;
|
||||
interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1";
|
||||
clock-names = "gpu", "gpu_pp0", "gpu_pp1";
|
||||
power-domains = <&zynqmp_firmware PD_GPU>;
|
||||
};
|
||||
|
||||
/* LPDDMA default allows only secured access. inorder to enable
|
||||
@ -439,6 +451,7 @@
|
||||
xlnx,bus-width = <64>;
|
||||
#stream-id-cells = <1>;
|
||||
iommus = <&smmu 0x868>;
|
||||
power-domains = <&zynqmp_firmware PD_ADMA>;
|
||||
};
|
||||
|
||||
lpd_dma_chan2: dma@ffa90000 {
|
||||
@ -451,6 +464,7 @@
|
||||
xlnx,bus-width = <64>;
|
||||
#stream-id-cells = <1>;
|
||||
iommus = <&smmu 0x869>;
|
||||
power-domains = <&zynqmp_firmware PD_ADMA>;
|
||||
};
|
||||
|
||||
lpd_dma_chan3: dma@ffaa0000 {
|
||||
@ -463,6 +477,7 @@
|
||||
xlnx,bus-width = <64>;
|
||||
#stream-id-cells = <1>;
|
||||
iommus = <&smmu 0x86a>;
|
||||
power-domains = <&zynqmp_firmware PD_ADMA>;
|
||||
};
|
||||
|
||||
lpd_dma_chan4: dma@ffab0000 {
|
||||
@ -475,6 +490,7 @@
|
||||
xlnx,bus-width = <64>;
|
||||
#stream-id-cells = <1>;
|
||||
iommus = <&smmu 0x86b>;
|
||||
power-domains = <&zynqmp_firmware PD_ADMA>;
|
||||
};
|
||||
|
||||
lpd_dma_chan5: dma@ffac0000 {
|
||||
@ -487,6 +503,7 @@
|
||||
xlnx,bus-width = <64>;
|
||||
#stream-id-cells = <1>;
|
||||
iommus = <&smmu 0x86c>;
|
||||
power-domains = <&zynqmp_firmware PD_ADMA>;
|
||||
};
|
||||
|
||||
lpd_dma_chan6: dma@ffad0000 {
|
||||
@ -499,6 +516,7 @@
|
||||
xlnx,bus-width = <64>;
|
||||
#stream-id-cells = <1>;
|
||||
iommus = <&smmu 0x86d>;
|
||||
power-domains = <&zynqmp_firmware PD_ADMA>;
|
||||
};
|
||||
|
||||
lpd_dma_chan7: dma@ffae0000 {
|
||||
@ -511,6 +529,7 @@
|
||||
xlnx,bus-width = <64>;
|
||||
#stream-id-cells = <1>;
|
||||
iommus = <&smmu 0x86e>;
|
||||
power-domains = <&zynqmp_firmware PD_ADMA>;
|
||||
};
|
||||
|
||||
lpd_dma_chan8: dma@ffaf0000 {
|
||||
@ -523,6 +542,7 @@
|
||||
xlnx,bus-width = <64>;
|
||||
#stream-id-cells = <1>;
|
||||
iommus = <&smmu 0x86f>;
|
||||
power-domains = <&zynqmp_firmware PD_ADMA>;
|
||||
};
|
||||
|
||||
mc: memory-controller@fd070000 {
|
||||
@ -543,6 +563,7 @@
|
||||
#size-cells = <0>;
|
||||
#stream-id-cells = <1>;
|
||||
iommus = <&smmu 0x872>;
|
||||
power-domains = <&zynqmp_firmware PD_NAND>;
|
||||
};
|
||||
|
||||
gem0: ethernet@ff0b0000 {
|
||||
@ -556,6 +577,7 @@
|
||||
#size-cells = <0>;
|
||||
#stream-id-cells = <1>;
|
||||
iommus = <&smmu 0x874>;
|
||||
power-domains = <&zynqmp_firmware PD_ETH_0>;
|
||||
};
|
||||
|
||||
gem1: ethernet@ff0c0000 {
|
||||
@ -569,6 +591,7 @@
|
||||
#size-cells = <0>;
|
||||
#stream-id-cells = <1>;
|
||||
iommus = <&smmu 0x875>;
|
||||
power-domains = <&zynqmp_firmware PD_ETH_1>;
|
||||
};
|
||||
|
||||
gem2: ethernet@ff0d0000 {
|
||||
@ -582,6 +605,7 @@
|
||||
#size-cells = <0>;
|
||||
#stream-id-cells = <1>;
|
||||
iommus = <&smmu 0x876>;
|
||||
power-domains = <&zynqmp_firmware PD_ETH_2>;
|
||||
};
|
||||
|
||||
gem3: ethernet@ff0e0000 {
|
||||
@ -595,6 +619,7 @@
|
||||
#size-cells = <0>;
|
||||
#stream-id-cells = <1>;
|
||||
iommus = <&smmu 0x877>;
|
||||
power-domains = <&zynqmp_firmware PD_ETH_3>;
|
||||
};
|
||||
|
||||
gpio: gpio@ff0a0000 {
|
||||
@ -607,6 +632,7 @@
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x0 0xff0a0000 0x0 0x1000>;
|
||||
gpio-controller;
|
||||
power-domains = <&zynqmp_firmware PD_GPIO>;
|
||||
};
|
||||
|
||||
i2c0: i2c@ff020000 {
|
||||
@ -617,6 +643,7 @@
|
||||
reg = <0x0 0xff020000 0x0 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&zynqmp_firmware PD_I2C_0>;
|
||||
};
|
||||
|
||||
i2c1: i2c@ff030000 {
|
||||
@ -627,6 +654,7 @@
|
||||
reg = <0x0 0xff030000 0x0 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&zynqmp_firmware PD_I2C_1>;
|
||||
};
|
||||
|
||||
ocm: memory-controller@ff960000 {
|
||||
@ -665,6 +693,7 @@
|
||||
<0x0 0x0 0x0 0x2 &pcie_intc 0x2>,
|
||||
<0x0 0x0 0x0 0x3 &pcie_intc 0x3>,
|
||||
<0x0 0x0 0x0 0x4 &pcie_intc 0x4>;
|
||||
power-domains = <&zynqmp_firmware PD_PCIE>;
|
||||
pcie_intc: legacy-interrupt-controller {
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
@ -686,6 +715,7 @@
|
||||
#size-cells = <0>;
|
||||
#stream-id-cells = <1>;
|
||||
iommus = <&smmu 0x873>;
|
||||
power-domains = <&zynqmp_firmware PD_QSPI>;
|
||||
};
|
||||
|
||||
rtc: rtc@ffa60000 {
|
||||
@ -743,6 +773,7 @@
|
||||
reg = <0x0 0xfd0c0000 0x0 0x2000>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 133 4>;
|
||||
power-domains = <&zynqmp_firmware PD_SATA>;
|
||||
#stream-id-cells = <4>;
|
||||
iommus = <&smmu 0x4c0>, <&smmu 0x4c1>,
|
||||
<&smmu 0x4c2>, <&smmu 0x4c3>;
|
||||
@ -760,6 +791,7 @@
|
||||
xlnx,device_id = <0>;
|
||||
#stream-id-cells = <1>;
|
||||
iommus = <&smmu 0x870>;
|
||||
power-domains = <&zynqmp_firmware PD_SD_0>;
|
||||
nvmem-cells = <&soc_revision>;
|
||||
nvmem-cell-names = "soc_revision";
|
||||
};
|
||||
@ -775,6 +807,7 @@
|
||||
xlnx,device_id = <1>;
|
||||
#stream-id-cells = <1>;
|
||||
iommus = <&smmu 0x871>;
|
||||
power-domains = <&zynqmp_firmware PD_SD_1>;
|
||||
nvmem-cells = <&soc_revision>;
|
||||
nvmem-cell-names = "soc_revision";
|
||||
};
|
||||
@ -808,6 +841,7 @@
|
||||
clock-names = "ref_clk", "pclk";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&zynqmp_firmware PD_SPI_0>;
|
||||
};
|
||||
|
||||
spi1: spi@ff050000 {
|
||||
@ -819,6 +853,7 @@
|
||||
clock-names = "ref_clk", "pclk";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&zynqmp_firmware PD_SPI_1>;
|
||||
};
|
||||
|
||||
ttc0: timer@ff110000 {
|
||||
@ -828,6 +863,7 @@
|
||||
interrupts = <0 36 4>, <0 37 4>, <0 38 4>;
|
||||
reg = <0x0 0xff110000 0x0 0x1000>;
|
||||
timer-width = <32>;
|
||||
power-domains = <&zynqmp_firmware PD_TTC_0>;
|
||||
};
|
||||
|
||||
ttc1: timer@ff120000 {
|
||||
@ -837,6 +873,7 @@
|
||||
interrupts = <0 39 4>, <0 40 4>, <0 41 4>;
|
||||
reg = <0x0 0xff120000 0x0 0x1000>;
|
||||
timer-width = <32>;
|
||||
power-domains = <&zynqmp_firmware PD_TTC_1>;
|
||||
};
|
||||
|
||||
ttc2: timer@ff130000 {
|
||||
@ -846,6 +883,7 @@
|
||||
interrupts = <0 42 4>, <0 43 4>, <0 44 4>;
|
||||
reg = <0x0 0xff130000 0x0 0x1000>;
|
||||
timer-width = <32>;
|
||||
power-domains = <&zynqmp_firmware PD_TTC_2>;
|
||||
};
|
||||
|
||||
ttc3: timer@ff140000 {
|
||||
@ -855,6 +893,7 @@
|
||||
interrupts = <0 45 4>, <0 46 4>, <0 47 4>;
|
||||
reg = <0x0 0xff140000 0x0 0x1000>;
|
||||
timer-width = <32>;
|
||||
power-domains = <&zynqmp_firmware PD_TTC_3>;
|
||||
};
|
||||
|
||||
uart0: serial@ff000000 {
|
||||
@ -865,6 +904,7 @@
|
||||
interrupts = <0 21 4>;
|
||||
reg = <0x0 0xff000000 0x0 0x1000>;
|
||||
clock-names = "uart_clk", "pclk";
|
||||
power-domains = <&zynqmp_firmware PD_UART_0>;
|
||||
};
|
||||
|
||||
uart1: serial@ff010000 {
|
||||
@ -875,6 +915,7 @@
|
||||
interrupts = <0 22 4>;
|
||||
reg = <0x0 0xff010000 0x0 0x1000>;
|
||||
clock-names = "uart_clk", "pclk";
|
||||
power-domains = <&zynqmp_firmware PD_UART_1>;
|
||||
};
|
||||
|
||||
usb0: usb0@ff9d0000 {
|
||||
@ -884,6 +925,7 @@
|
||||
compatible = "xlnx,zynqmp-dwc3";
|
||||
reg = <0x0 0xff9d0000 0x0 0x100>;
|
||||
clock-names = "bus_clk", "ref_clk";
|
||||
power-domains = <&zynqmp_firmware PD_USB_0>;
|
||||
ranges;
|
||||
nvmem-cells = <&soc_revision>;
|
||||
nvmem-cell-names = "soc_revision";
|
||||
@ -909,6 +951,7 @@
|
||||
compatible = "xlnx,zynqmp-dwc3";
|
||||
reg = <0x0 0xff9e0000 0x0 0x100>;
|
||||
clock-names = "bus_clk", "ref_clk";
|
||||
power-domains = <&zynqmp_firmware PD_USB_1>;
|
||||
ranges;
|
||||
nvmem-cells = <&soc_revision>;
|
||||
nvmem-cell-names = "soc_revision";
|
||||
@ -1001,6 +1044,7 @@
|
||||
interrupts = <0 122 4>;
|
||||
interrupt-parent = <&gic>;
|
||||
clock-names = "axi_clk";
|
||||
power-domains = <&zynqmp_firmware PD_DP>;
|
||||
dma-channels = <6>;
|
||||
#dma-cells = <1>;
|
||||
dma-video0channel {
|
||||
|
||||
Loading…
Reference in New Issue
Block a user