ddr: marvell: a38x: add support for twin-die combined memory device
commit 6285efb8a118940877522c4c07bd7c64569b4f5f upstream. the twin-die combined memory device should be treatened as X8 device and not as X16 one Signed-off-by: Moti Buskila <motib@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com> [ - the default value for twin_die_combined is set to NOT_COMBINED for all boards, as this was default behaviour prior this change ] Signed-off-by: Marek Behún <marek.behun@nic.cz> Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
This commit is contained in:
committed by
Stefan Roese
parent
52dd9b96fc
commit
32e7a6baef
@@ -286,6 +286,7 @@ static struct mv_ddr_topology_map board_topology_map_1g = {
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MV_DDR_TIM_2T} }, /* timing */
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BUS_MASK_32BIT, /* Busses mask */
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MV_DDR_CFG_DEFAULT, /* ddr configuration data source */
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NOT_COMBINED, /* ddr twin-die combined */
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{ {0} }, /* raw spd data */
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{0} /* timing parameters */
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};
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@@ -308,6 +309,7 @@ static struct mv_ddr_topology_map board_topology_map_2g = {
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MV_DDR_TIM_2T} }, /* timing */
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BUS_MASK_32BIT, /* Busses mask */
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MV_DDR_CFG_DEFAULT, /* ddr configuration data source */
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NOT_COMBINED, /* ddr twin-die combined */
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{ {0} }, /* raw spd data */
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{0} /* timing parameters */
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};
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@@ -73,6 +73,7 @@ static struct mv_ddr_topology_map board_topology_map = {
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MV_DDR_TIM_DEFAULT} }, /* timing */
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BUS_MASK_32BIT, /* Busses mask */
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MV_DDR_CFG_DEFAULT, /* ddr configuration data source */
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NOT_COMBINED, /* ddr twin-die combined */
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{ {0} }, /* raw spd data */
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{0} /* timing parameters */
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};
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@@ -94,6 +94,7 @@ static struct mv_ddr_topology_map board_topology_map = {
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MV_DDR_TIM_DEFAULT} }, /* timing */
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BUS_MASK_32BIT, /* Busses mask */
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MV_DDR_CFG_DEFAULT, /* ddr configuration data source */
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NOT_COMBINED, /* ddr twin-die combined */
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{ {0} }, /* raw spd data */
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{0} /* timing parameters */
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};
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@@ -68,6 +68,7 @@ static struct mv_ddr_topology_map board_topology_map = {
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MV_DDR_TIM_2T} }, /* timing */
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BUS_MASK_32BIT_ECC, /* subphys mask */
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MV_DDR_CFG_DEFAULT, /* ddr configuration data source */
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NOT_COMBINED, /* ddr twin-die combined */
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{ {0} }, /* raw spd data */
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{0}, /* timing parameters */
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{ {0} }, /* electrical configuration */
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@@ -71,6 +71,7 @@ static struct mv_ddr_topology_map ddr_topology_map = {
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MV_DDR_TIM_DEFAULT} }, /* timing */
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BUS_MASK_32BIT, /* Busses mask */
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MV_DDR_CFG_DEFAULT, /* ddr configuration data source */
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NOT_COMBINED, /* ddr twin-die combined */
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{ {0} }, /* raw spd data */
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{0} /* timing parameters */
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@@ -71,6 +71,7 @@ static struct mv_ddr_topology_map board_topology_map = {
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MV_DDR_TIM_DEFAULT} }, /* timing */
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BUS_MASK_32BIT_ECC, /* Busses mask */
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MV_DDR_CFG_DEFAULT, /* ddr configuration data source */
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NOT_COMBINED, /* ddr twin-die combined */
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{ {0} }, /* raw spd data */
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{0} /* timing parameters */
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};
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@@ -142,6 +142,7 @@ static struct mv_ddr_topology_map board_topology_map = {
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MV_DDR_TIM_DEFAULT} }, /* timing */
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BUS_MASK_32BIT, /* Busses mask */
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MV_DDR_CFG_DEFAULT, /* ddr configuration data source */
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NOT_COMBINED, /* ddr twin-die combined */
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{ {0} }, /* raw spd data */
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{0}, /* timing parameters */
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{ {0} }, /* electrical configuration */
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