mips: octeon: cpu.c: Implement configure_lmtdma_window()
Import configure_lmtdma_window from Marvell 2013 U-Boot as it's needed for network functionality. Signed-off-by: Stefan Roese <sr@denx.de>
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@@ -1,6 +1,6 @@
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// SPDX-License-Identifier: GPL-2.0+
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// SPDX-License-Identifier: GPL-2.0+
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/*
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/*
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* Copyright (C) 2020 Marvell International Ltd.
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* Copyright (C) 2020-2022 Marvell International Ltd.
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*/
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*/
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#include <dm.h>
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#include <dm.h>
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@@ -17,6 +17,8 @@
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#include <mach/cvmx-bootmem.h>
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#include <mach/cvmx-bootmem.h>
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#include <mach/cvmx-regs.h>
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#include <mach/cvmx-regs.h>
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#include <mach/cvmx-sata-defs.h>
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#include <mach/cvmx-sata-defs.h>
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#include <mach/octeon-model.h>
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#include <mach/octeon-feature.h>
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DECLARE_GLOBAL_DATA_PTR;
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DECLARE_GLOBAL_DATA_PTR;
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@@ -393,6 +395,33 @@ static int init_bootcmd_console(void)
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return ret;
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return ret;
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}
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}
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static void configure_lmtdma_window(void)
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{
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u64 tmp;
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u64 addr;
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u64 end_addr;
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CVMX_MF_CVM_MEM_CTL(tmp);
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tmp &= ~0x1ffull;
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tmp |= 0x104ull;
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/* enable LMTDMA */
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tmp |= (1ull << 51);
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/* configure scratch line 2 for LMT */
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/* TODO: reserve this scratch line, so that others will not use it */
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/* TODO: store LMTLINE in global var */
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tmp |= (CVMX_PKO_LMTLINE << 45);
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/* clear LMTLINE in scratch */
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addr = CVMX_PKO_LMTLINE * CVMX_CACHE_LINE_SIZE;
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end_addr = addr + CVMX_CACHE_LINE_SIZE;
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while (addr < end_addr) {
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*CASTPTR(volatile u64, addr + CVMX_SCRATCH_BASE) = (u64)0;
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addr += 8;
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}
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CVMX_MT_CVM_MEM_CTL(tmp);
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}
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int arch_early_init_r(void)
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int arch_early_init_r(void)
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{
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{
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int ret;
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int ret;
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@@ -405,6 +434,9 @@ int arch_early_init_r(void)
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if (ret)
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if (ret)
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return ret;
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return ret;
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if (octeon_has_feature(OCTEON_FEATURE_PKO3))
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configure_lmtdma_window();
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return 0;
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return 0;
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}
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}
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