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Merge branch 'remove-config-nr-dram-banks-v9-2020-08-26' of https://gitlab.denx.de/u-boot/custodians/u-boot-marvell into next

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This commit is contained in:
Tom Rini
2020-09-07 14:31:00 -04:00
parent 96d66a9b8c bac9da46c5
commit 314b9b4a38
37 changed files with 40 additions and 141 deletions
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2
arch/mips/lib/boot.c
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@@ -17,7 +17,7 @@ unsigned long do_go_exec(ulong (*entry)(int, char * const []),
* whole SDRAM area, since we don't know the size of the image
* that was loaded.
*/
flush_cache(gd->bd->bi_memstart, gd->ram_top - gd->bd->bi_memstart);
flush_cache(gd->ram_base, gd->ram_top - gd->ram_base);
return entry(argc, argv);
}

2
arch/mips/lib/bootm.c
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@@ -242,7 +242,7 @@ static int boot_reloc_fdt(bootm_headers_t *images)
#if CONFIG_IS_ENABLED(MIPS_BOOT_FDT) && CONFIG_IS_ENABLED(OF_LIBFDT)
int arch_fixup_fdt(void *blob)
{
u64 mem_start = virt_to_phys((void *)gd->bd->bi_memstart);
u64 mem_start = virt_to_phys((void *)gd->ram_base);
u64 mem_size = gd->ram_size;
return fdt_fixup_memory_banks(blob, &mem_start, &mem_size, 1);

2
arch/powerpc/cpu/mpc83xx/fdt.c
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@@ -121,7 +121,7 @@ void ft_cpu_setup(void *blob, struct bd_info *bd)
"clock-frequency", get_serial_clock(), 1);
#endif
fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
fdt_fixup_memory(blob, (u64)gd->ram_base, (u64)gd->ram_size);
#if defined(CONFIG_BOOTCOUNT_LIMIT) && \
(defined(CONFIG_QE) && !defined(CONFIG_ARCH_MPC831X))

2
arch/powerpc/cpu/mpc83xx/traps.c
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@@ -23,7 +23,7 @@ DECLARE_GLOBAL_DATA_PTR;
/* Returns 0 if exception not found and fixup otherwise. */
extern unsigned long search_exception_table(unsigned long);
#define END_OF_MEM (gd->bd->bi_memstart + gd->bd->bi_memsize)
#define END_OF_MEM (gd->ram_base + gd->ram_size)
/*
* Trap & Exception support

4
arch/powerpc/cpu/mpc85xx/fdt.c
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@@ -672,10 +672,10 @@ void ft_cpu_setup(void *blob, struct bd_info *bd)
"clock-frequency", get_bus_freq(0), 1);
#endif
fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
fdt_fixup_memory(blob, (u64)gd->ram_base, (u64)gd->ram_size);
#ifdef CONFIG_MP
ft_fixup_cpu(blob, (u64)bd->bi_memstart + (u64)bd->bi_memsize);
ft_fixup_cpu(blob, (u64)gd->ram_base + (u64)gd->ram_size);
ft_fixup_num_cores(blob);
#endif

2
arch/powerpc/cpu/mpc85xx/traps.c
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@@ -37,7 +37,7 @@ extern unsigned long search_exception_table(unsigned long);
* amount of memory on the system if we're unable to keep all
* the memory mapped in.
*/
#define END_OF_MEM (gd->bd->bi_memstart + get_effective_memsize())
#define END_OF_MEM (gd->ram_base + get_effective_memsize())
static __inline__ void set_tsr(unsigned long val)
{

4
arch/powerpc/cpu/mpc86xx/fdt.c
View File

@@ -8,6 +8,8 @@
#include <fdt_support.h>
#include <asm/mp.h>
DECLARE_GLOBAL_DATA_PTR;
extern void ft_fixup_num_cores(void *blob);
extern void ft_srio_setup(void *blob);
@@ -27,7 +29,7 @@ void ft_cpu_setup(void *blob, struct bd_info *bd)
do_fixup_by_prop_u32(blob, "device_type", "soc", 4,
"bus-frequency", bd->bi_busfreq, 1);
fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
fdt_fixup_memory(blob, (u64)gd->ram_base, (u64)gd->ram_size);
#ifdef CONFIG_SYS_NS16550
do_fixup_by_compat_u32(blob, "ns16550",

2
arch/powerpc/cpu/mpc86xx/traps.c
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@@ -30,7 +30,7 @@ extern unsigned long search_exception_table(unsigned long);
* amount of memory on the system if we're unable to keep all
* the memory mapped in.
*/
#define END_OF_MEM (gd->bd->bi_memstart + get_effective_memsize())
#define END_OF_MEM (gd->ram_base + get_effective_memsize())
/*
* Trap & Exception support

2
arch/powerpc/cpu/mpc8xx/fdt.c
View File

@@ -25,5 +25,5 @@ void ft_cpu_setup(void *blob, struct bd_info *bd)
do_fixup_by_compat_u32(blob, "fsl,cpm-brg", "clock-frequency",
gd->arch.brg_clk, 1);
fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
fdt_fixup_memory(blob, (u64)gd->ram_base, (u64)gd->ram_size);
}

4
arch/powerpc/lib/bootm.c
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@@ -298,8 +298,8 @@ void boot_prep_vxworks(bootm_headers_t *images)
if (!images->ft_addr)
return;
base = (u64)gd->bd->bi_memstart;
size = (u64)gd->bd->bi_memsize;
base = (u64)gd->ram_base;
size = (u64)gd->ram_size;
off = fdt_path_offset(images->ft_addr, "/memory");
if (off < 0)

2
arch/x86/cpu/broadwell/cpu_from_spl.c
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@@ -53,14 +53,12 @@ void board_debug_uart_init(void)
int dram_init_banksize(void)
{
#ifdef CONFIG_NR_DRAM_BANKS
struct spl_handoff *ho;
ho = bloblist_find(BLOBLISTT_SPL_HANDOFF, sizeof(*ho));
if (!ho)
return log_msg_ret("Missing SPL hand-off info", -ENOENT);
handoff_load_dram_banks(ho);
#endif
return 0;
}

2
arch/xtensa/lib/Makefile
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@@ -5,4 +5,4 @@
obj-$(CONFIG_CMD_BOOTM) += bootm.o
obj-y += cache.o misc.o relocate.o time.o bdinfo.o
obj-y += cache.o misc.o relocate.o time.o

22
arch/xtensa/lib/bdinfo.c
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@@ -1,22 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* XTENSA-specific information for the 'bd' command
*
* (C) Copyright 2003
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
#include <common.h>
#include <init.h>
DECLARE_GLOBAL_DATA_PTR;
int arch_setup_bdinfo(void)
{
struct bd_info *bd = gd->bd;
bd->bi_memstart = PHYSADDR(CONFIG_SYS_SDRAM_BASE);
bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
return 0;
}

5
arch/xtensa/lib/bootm.c
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@@ -41,15 +41,14 @@ static struct bp_tag *setup_last_tag(struct bp_tag *params)
static struct bp_tag *setup_memory_tag(struct bp_tag *params)
{
struct bd_info *bd = gd->bd;
struct meminfo *mem;
params->id = BP_TAG_MEMORY;
params->size = sizeof(struct meminfo);
mem = (struct meminfo *)params->data;
mem->type = MEMORY_TYPE_CONVENTIONAL;
mem->start = bd->bi_memstart;
mem->end = bd->bi_memstart + bd->bi_memsize;
mem->start = PHYSADDR(gd->ram_base);
mem->end = PHYSADDR(gd->ram_base + gd->ram_size);
printf(" MEMORY: tag:0x%04x, type:0X%lx, start:0X%lx, end:0X%lx\n",
BP_TAG_MEMORY, mem->type, mem->start, mem->end);