Merge tag 'xilinx-for-v2020.10-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2020.10-rc3 - Fix fdtfile variable setup - Fix bootm_*/fdt_high/initrd_high variables handling - Fix Kconfig dependencies for Xilinx drivers - Fix booting u-boot from lowest memory - Fix firmware payload argument count for Versal - Fix dfu configurations - Fix mio_bank property handling - Fix and align code around ID detection - Start to use ENV_VARS_UBOOT_RUNTIME_CONFIG - Simplify logic around reading MAC from eeprom - Decrease malloc length for zynqmp mini qspi - Enable preboot for ZynqMP and Versal i2c: - Fix i2c eeprom partitions handling mmc: - Fix logic around HS mode enabling and use proper functions
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@@ -68,23 +68,6 @@
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#define CLOCK_NODE_TYPE_DIV 4
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#define CLOCK_NODE_TYPE_GATE 6
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enum pm_query_id {
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PM_QID_INVALID,
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PM_QID_CLOCK_GET_NAME,
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PM_QID_CLOCK_GET_TOPOLOGY,
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PM_QID_CLOCK_GET_FIXEDFACTOR_PARAMS,
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PM_QID_CLOCK_GET_PARENTS,
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PM_QID_CLOCK_GET_ATTRIBUTES,
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PM_QID_PINCTRL_GET_NUM_PINS,
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PM_QID_PINCTRL_GET_NUM_FUNCTIONS,
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PM_QID_PINCTRL_GET_NUM_FUNCTION_GROUPS,
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PM_QID_PINCTRL_GET_FUNCTION_NAME,
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PM_QID_PINCTRL_GET_FUNCTION_GROUPS,
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PM_QID_PINCTRL_GET_PIN_GROUPS,
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PM_QID_CLOCK_GET_NUM_CLOCKS,
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PM_QID_CLOCK_GET_MAX_DIVISOR,
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};
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enum clk_type {
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CLK_TYPE_OUTPUT,
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CLK_TYPE_EXTERNAL,
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