Merge tag 'xilinx-for-v2020.10-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2020.10-rc3

- Fix fdtfile variable setup
- Fix bootm_*/fdt_high/initrd_high variables handling
- Fix Kconfig dependencies for Xilinx drivers
- Fix booting u-boot from lowest memory
- Fix firmware payload argument count for Versal
- Fix dfu configurations
- Fix mio_bank property handling
- Fix and align code around ID detection
- Start to use ENV_VARS_UBOOT_RUNTIME_CONFIG
- Simplify logic around reading MAC from eeprom
- Decrease malloc length for zynqmp mini qspi
- Enable preboot for ZynqMP and Versal

i2c:
- Fix i2c eeprom partitions handling

mmc:
- Fix logic around HS mode enabling and use proper functions

configs/sandbox_defconfig

@@ -119,6 +119,7 @@ CONFIG_DM_BOOTCOUNT=y
 CONFIG_DM_BOOTCOUNT_RTC=y
 CONFIG_BUTTON=y
 CONFIG_BUTTON_GPIO=y
+CONFIG_DM_BOOTCOUNT_I2C_EEPROM=y
 CONFIG_CLK=y
 CONFIG_CLK_COMPOSITE_CCF=y
 CONFIG_SANDBOX_CLK_CCF=y

configs/xilinx_versal_virt_defconfig

@@ -9,6 +9,7 @@ CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_BOOTDELAY=5
+CONFIG_USE_PREBOOT=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_BOARD_EARLY_INIT_R=y
 CONFIG_SYS_PROMPT="Versal> "
@@ -43,6 +44,9 @@ CONFIG_FPGA_VERSALPL=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_CADENCE=y
 CONFIG_MISC=y
+CONFIG_I2C_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x0
+CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0
 CONFIG_MMC_IO_VOLTAGE=y
 CONFIG_MMC_UHS_SUPPORT=y
 CONFIG_MMC_HS400_SUPPORT=y

configs/xilinx_zynqmp_virt_defconfig

@@ -15,6 +15,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_LOAD_FIT_ADDRESS=0x10000000
+CONFIG_USE_PREBOOT=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_BOARD_EARLY_INIT_R=y
@@ -65,6 +66,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_SCSI_AHCI=y
 CONFIG_SATA_CEVA=y
 CONFIG_CLK_ZYNQMP=y
+CONFIG_DFU_TFTP=y
 CONFIG_DFU_RAM=y
 CONFIG_USB_FUNCTION_FASTBOOT=y
 CONFIG_FASTBOOT_FLASH=y