ARM: rmobile: Add R8A7796 support
Add Kconfig entry for the R8A7796 RCar M3 SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This commit is contained in:
Marek Vasut
Nobuhiro Iwamatsu
parent
e965c89008
commit
2dea3b3e7b
@ -6,6 +6,9 @@ choice
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config R8A7795
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bool "Renesas SoC R8A7795"
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config R8A7796
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bool "Renesas SoC R8A7796"
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endchoice
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choice
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@ -17,5 +17,6 @@ obj-$(CONFIG_R8A7792) += lowlevel_init_ca15.o cpu_info-rcar.o pfc-r8a7792.o
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obj-$(CONFIG_R8A7793) += lowlevel_init_ca15.o cpu_info-rcar.o pfc-r8a7793.o
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obj-$(CONFIG_R8A7794) += lowlevel_init_ca15.o cpu_info-rcar.o pfc-r8a7794.o
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obj-$(CONFIG_R8A7795) += lowlevel_init_gen3.o cpu_info-rcar.o pfc-r8a7795.o memmap-r8a7795.o
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obj-$(CONFIG_R8A7796) += lowlevel_init_gen3.o cpu_info-rcar.o pfc-r8a7796.o memmap-r8a7796.o
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obj-$(CONFIG_SH73A0) += lowlevel_init.o cpu_info-sh73a0.o pfc-sh73a0.o
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obj-$(CONFIG_TMU_TIMER) += ../../sh/lib/time.o
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39
arch/arm/mach-rmobile/include/mach/r8a7796.h
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39
arch/arm/mach-rmobile/include/mach/r8a7796.h
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@ -0,0 +1,39 @@
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/*
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* arch/arm/include/asm/arch-rcar_gen3/r8a7796.h
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* This file defines registers and value for r8a7796.
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*
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* Copyright (C) 2016 Renesas Electronics Corporation
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __ASM_ARCH_R8A7796_H
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#define __ASM_ARCH_R8A7796_H
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#include "rcar-gen3-base.h"
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/* Module stop control/status register bits */
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#define MSTP0_BITS 0x00200000
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#define MSTP1_BITS 0xFFFFFFFF
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#define MSTP2_BITS 0x340E2FDC
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#define MSTP3_BITS 0xFFFFFFDF
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#define MSTP4_BITS 0x80000184
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#define MSTP5_BITS 0xC3FFFFFF
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#define MSTP6_BITS 0xFFFFFFFF
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#define MSTP7_BITS 0xFFFFFFFF
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#define MSTP8_BITS 0x01F1FFF7
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#define MSTP9_BITS 0xFFFFFFFE
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#define MSTP10_BITS 0xFFFEFFE0
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#define MSTP11_BITS 0x000000B7
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/* SDHI */
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#define CONFIG_SYS_SH_SDHI0_BASE 0xEE100000
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#define CONFIG_SYS_SH_SDHI1_BASE 0xEE120000
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#define CONFIG_SYS_SH_SDHI2_BASE 0xEE140000 /* either MMC0 */
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#define CONFIG_SYS_SH_SDHI3_BASE 0xEE160000 /* either MMC1 */
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#define CONFIG_SYS_SH_SDHI_NR_CHANNEL 4
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/* SH-I2C */
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#define CONFIG_SYS_I2C_SH_BASE0 0xE60B0000
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#endif /* __ASM_ARCH_R8A7796_H */
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@ -18,6 +18,8 @@
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#include <asm/arch/r8a7794.h>
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#elif defined(CONFIG_R8A7795)
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#include <asm/arch/r8a7795.h>
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#elif defined(CONFIG_R8A7796)
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#include <asm/arch/r8a7796.h>
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#else
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#error "SOC Name not defined"
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#endif
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30
arch/arm/mach-rmobile/memmap-r8a7796.c
Normal file
30
arch/arm/mach-rmobile/memmap-r8a7796.c
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@ -0,0 +1,30 @@
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/*
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* Copyright (C) 2017 Marek Vasut <marek.vasut+renesas@gmail.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/armv8/mmu.h>
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static struct mm_region r8a7796_mem_map[] = {
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{
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.virt = 0x0UL,
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.phys = 0x0UL,
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.size = 0xe0000000UL,
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.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
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PTE_BLOCK_INNER_SHARE
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}, {
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.virt = 0xe0000000UL,
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.phys = 0xe0000000UL,
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.size = 0xe0000000UL,
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.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
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PTE_BLOCK_NON_SHARE |
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PTE_BLOCK_PXN | PTE_BLOCK_UXN
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}, {
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/* List terminator */
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0,
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}
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};
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struct mm_region *mem_map = r8a7796_mem_map;
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@ -2,7 +2,7 @@
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* include/configs/rcar-gen3-common.h
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* This file is R-Car Gen3 common configuration file.
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*
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* Copyright (C) 2015 Renesas Electronics Corporation
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* Copyright (C) 2015-2017 Renesas Electronics Corporation
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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@ -55,10 +55,31 @@
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#define CONFIG_SYS_TEXT_BASE 0x50000000
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x7fff0)
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#define CONFIG_SYS_SDRAM_BASE (0x48000000)
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#define CONFIG_SYS_SDRAM_SIZE (1024u * 1024 * 1024 - 0x08000000)
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#define CONFIG_SYS_LOAD_ADDR (0x48080000)
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#define CONFIG_NR_DRAM_BANKS 1
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#define DRAM_RSV_SIZE 0x08000000
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#if defined(CONFIG_R8A7795)
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#define CONFIG_NR_DRAM_BANKS 4
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#define PHYS_SDRAM_1 (0x40000000 + DRAM_RSV_SIZE)
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#define PHYS_SDRAM_1_SIZE (0x40000000u - DRAM_RSV_SIZE)
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#define PHYS_SDRAM_2 0x500000000
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#define PHYS_SDRAM_2_SIZE 0x40000000u
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#define PHYS_SDRAM_3 0x600000000
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#define PHYS_SDRAM_3_SIZE 0x40000000u
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#define PHYS_SDRAM_4 0x700000000
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#define PHYS_SDRAM_4_SIZE 0x40000000u
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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#define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_1_SIZE
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#elif defined(CONFIG_R8A7796)
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#define CONFIG_NR_DRAM_BANKS 2
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#define PHYS_SDRAM_1 (0x40000000 + DRAM_RSV_SIZE)
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#define PHYS_SDRAM_1_SIZE (0x80000000u - DRAM_RSV_SIZE)
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#define PHYS_SDRAM_2 0x0600000000
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#define PHYS_SDRAM_2_SIZE 0x80000000u
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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#define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_1_SIZE
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#endif
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#define CONFIG_SYS_LOAD_ADDR 0x48080000
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#define CONFIG_VERY_BIG_RAM
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#define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_SDRAM_SIZE
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#define CONFIG_SYS_MONITOR_BASE 0x00000000
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#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
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