pci: gt64120: Use PCI_CONF1_ADDRESS() macro

PCI gt64120 driver uses standard format of Config Address for PCI
Configuration Mechanism #1.

So use new U-Boot macro PCI_CONF1_ADDRESS() and remove old custom driver
address macros.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Pali Rohár 2021-11-26 11:42:42 +01:00 committed by Tom Rini
parent 2a8d4025c3
commit 2b29d79be8
2 changed files with 2 additions and 17 deletions

View File

@ -48,7 +48,7 @@ static int gt_config_access(struct gt64120_pci_controller *gt,
{ {
unsigned int bus = PCI_BUS(bdf); unsigned int bus = PCI_BUS(bdf);
unsigned int dev = PCI_DEV(bdf); unsigned int dev = PCI_DEV(bdf);
unsigned int devfn = PCI_DEV(bdf) << 3 | PCI_FUNC(bdf); unsigned int func = PCI_FUNC(bdf);
u32 intr; u32 intr;
u32 addr; u32 addr;
u32 val; u32 val;
@ -65,10 +65,7 @@ static int gt_config_access(struct gt64120_pci_controller *gt,
/* Clear cause register bits */ /* Clear cause register bits */
writel(~GT_INTRCAUSE_ABORT_BITS, &gt->regs->intrcause); writel(~GT_INTRCAUSE_ABORT_BITS, &gt->regs->intrcause);
addr = GT_PCI0_CFGADDR_CONFIGEN_BIT; addr = PCI_CONF1_ADDRESS(bus, dev, func, where);
addr |= bus << GT_PCI0_CFGADDR_BUSNUM_SHF;
addr |= devfn << GT_PCI0_CFGADDR_FUNCTNUM_SHF;
addr |= (where / 4) << GT_PCI0_CFGADDR_REGNUM_SHF;
/* Setup address */ /* Setup address */
writel(addr, &gt->regs->pci0_cfgaddr); writel(addr, &gt->regs->pci0_cfgaddr);

View File

@ -491,18 +491,6 @@
#define GT_INTRCAUSE_TARABORT0_BIT GT_INTRCAUSE_TARABORT0_MSK #define GT_INTRCAUSE_TARABORT0_BIT GT_INTRCAUSE_TARABORT0_MSK
#define GT_PCI0_CFGADDR_REGNUM_SHF 2
#define GT_PCI0_CFGADDR_REGNUM_MSK (MSK(6) << GT_PCI0_CFGADDR_REGNUM_SHF)
#define GT_PCI0_CFGADDR_FUNCTNUM_SHF 8
#define GT_PCI0_CFGADDR_FUNCTNUM_MSK (MSK(3) << GT_PCI0_CFGADDR_FUNCTNUM_SHF)
#define GT_PCI0_CFGADDR_DEVNUM_SHF 11
#define GT_PCI0_CFGADDR_DEVNUM_MSK (MSK(5) << GT_PCI0_CFGADDR_DEVNUM_SHF)
#define GT_PCI0_CFGADDR_BUSNUM_SHF 16
#define GT_PCI0_CFGADDR_BUSNUM_MSK (MSK(8) << GT_PCI0_CFGADDR_BUSNUM_SHF)
#define GT_PCI0_CFGADDR_CONFIGEN_SHF 31
#define GT_PCI0_CFGADDR_CONFIGEN_MSK (MSK(1) << GT_PCI0_CFGADDR_CONFIGEN_SHF)
#define GT_PCI0_CFGADDR_CONFIGEN_BIT GT_PCI0_CFGADDR_CONFIGEN_MSK
#define GT_PCI0_CMD_MBYTESWAP_SHF 0 #define GT_PCI0_CMD_MBYTESWAP_SHF 0
#define GT_PCI0_CMD_MBYTESWAP_MSK (MSK(1) << GT_PCI0_CMD_MBYTESWAP_SHF) #define GT_PCI0_CMD_MBYTESWAP_MSK (MSK(1) << GT_PCI0_CMD_MBYTESWAP_SHF)
#define GT_PCI0_CMD_MBYTESWAP_BIT GT_PCI0_CMD_MBYTESWAP_MSK #define GT_PCI0_CMD_MBYTESWAP_BIT GT_PCI0_CMD_MBYTESWAP_MSK