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spi: zynq_qspi: Fix programming qspi speed

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When programming qspi flash speed we need to check the requested flash
speed not to exceed the spi max frequency. In the current implementation
we are checking qspi ref clk instead. This commit fixes the issue by
checking the requested speed and programs the specified max frequency.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1657893679-20039-5-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
This commit is contained in:
Ashok Reddy Soma 2022-07-15 19:31:19 +05:30 committed by Michal Simek
parent bc4795850b
commit 2a75bc1303
1 changed files with 3 additions and 6 deletions
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9
drivers/spi/zynq_qspi.c
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@ -622,15 +622,12 @@ static int zynq_qspi_set_speed(struct udevice *bus, uint speed)
uint32_t confr;
u8 baud_rate_val = 0;
if (speed > plat->frequency)
speed = plat->frequency;
if (!speed || speed > priv->max_hz)
speed = priv->max_hz;
/* Set the clock frequency */
confr = readl(&regs->cr);
if (speed == 0) {
/* Set baudrate x8, if the freq is 0 */
baud_rate_val = 0x2;
} else if (plat->speed_hz != speed) {
if (plat->speed_hz != speed) {
while ((baud_rate_val < ZYNQ_QSPI_CR_BAUD_MAX) &&
((plat->frequency /
(2 << baud_rate_val)) > speed))