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arm: mvebu: Enable NAND controller on MVEBU SoC's

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This patch enables the NAND controller on the Armada XP/38x and provides
a new function that returns the NAND controller input clock. This
function will be used by the MVEBU NAND driver.

As part of this patch, the multiple BIT macro definitions are moved
to a common place in soc.h.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Peter Morrow <peter@senient.com>
Cc: Luka Perkov <luka.perkov@sartura.hr>
This commit is contained in:
Stefan Roese
2015-07-16 10:40:05 +02:00
committed by Luka Perkov
parent 501c098a1f
commit 2a0b7dc3b6
7 changed files with 40 additions and 7 deletions
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2
board/Marvell/db-88f6820-gp/db-88f6820-gp.c
View File

@@ -15,8 +15,6 @@
DECLARE_GLOBAL_DATA_PTR;
#define BIT(nr) (1UL << (nr))
#define ETH_PHY_CTRL_REG 0
#define ETH_PHY_CTRL_POWER_DOWN_BIT 11
#define ETH_PHY_CTRL_POWER_DOWN_MASK (1 << ETH_PHY_CTRL_POWER_DOWN_BIT)

2
board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c
View File

@@ -12,8 +12,6 @@
DECLARE_GLOBAL_DATA_PTR;
#define BIT(nr) (1UL << (nr))
#define ETH_PHY_CTRL_REG 0
#define ETH_PHY_CTRL_POWER_DOWN_BIT 11
#define ETH_PHY_CTRL_POWER_DOWN_MASK (1 << ETH_PHY_CTRL_POWER_DOWN_BIT)